aboutsummaryrefslogtreecommitdiffstats
Commit message (Expand)AuthorAgeFilesLines
...
* | Added "stat" to "synth" and "synth_xilinx"Clifford Wolf2015-02-152-0/+4
* | Added final checks to "synth" and "synth_xilinx"Clifford Wolf2015-02-152-7/+24
* | Added "check -noinit"Clifford Wolf2015-02-151-3/+19
* | Cosmetic fixes in "hierarchy" for blackbox modulesClifford Wolf2015-02-151-2/+4
* | More emscripten stuff, Added example appClifford Wolf2015-02-155-4/+99
* | Fixed default EMCCFLAGSClifford Wolf2015-02-151-5/+8
* | Smaller default parameters in $mem simlib modelClifford Wolf2015-02-151-2/+2
* | Fixed "stat" handling of blackbox modulesClifford Wolf2015-02-141-9/+6
* | Various fixes for memories with offsetsClifford Wolf2015-02-145-13/+24
* | Added $meminit support to "memory" commandClifford Wolf2015-02-147-48/+98
* | Added $meminit test caseClifford Wolf2015-02-141-0/+30
* | Added "read_verilog -nomeminit" and "nomeminit" attributeClifford Wolf2015-02-145-7/+34
* | Creating $meminit cells in verilog front-endClifford Wolf2015-02-144-33/+57
* | Added $meminit cell typeClifford Wolf2015-02-144-1/+33
* | Fixed handling of "//" in filenames in verilog pre-processorClifford Wolf2015-02-142-1/+5
* | Fixed "write_verilog -attr2comment" handling of "*/" in stringsClifford Wolf2015-02-131-2/+4
* | hotfix in "check" commandClifford Wolf2015-02-131-1/+2
* | Added "check" commandClifford Wolf2015-02-133-0/+131
* | Added AstNode::simplify() recursion counterClifford Wolf2015-02-131-2/+10
* | Added EMCCFLAGSClifford Wolf2015-02-131-0/+8
* | Some test related fixesClifford Wolf2015-02-126-156/+6
* | Added "proc_dlatch"Clifford Wolf2015-02-123-1/+311
* | Less aggressive "share" defaultsClifford Wolf2015-02-101-4/+6
* | Improved read_verilog support for empty behavioral statementsClifford Wolf2015-02-101-6/+2
* | Added "scc -expect <N> -nofeedback"Clifford Wolf2015-02-101-7/+48
* | Some hashlib improvementsClifford Wolf2015-02-091-9/+37
* | Various changes to release checklistClifford Wolf2015-02-092-45/+28
* | Fixed creation of command reference in manualClifford Wolf2015-02-093-9/+16
* | We are now in 0.5+ developmentClifford Wolf2015-02-091-1/+1
* | Yosys 0.5Clifford Wolf2015-02-091-1/+1
* | Bugfix in "make vcxsrc"Clifford Wolf2015-02-091-1/+1
* | Updated command reference in manualClifford Wolf2015-02-091-75/+440
* | Various presentation fixesClifford Wolf2015-02-092-8/+15
* | Fixed iterator invalidation bug in "rename" commandClifford Wolf2015-02-091-3/+4
* | CodingReadme updateClifford Wolf2015-02-081-0/+1
* | Fixed bug in "show -format .."Clifford Wolf2015-02-081-1/+1
* | Added new APIs to changelogClifford Wolf2015-02-081-0/+1
* | Fixed eval_select_op() apiClifford Wolf2015-02-082-2/+2
* | Added eval_select_args() and eval_select_op()Clifford Wolf2015-02-082-4/+29
* | Minor "make vgtest" changesClifford Wolf2015-02-082-2/+6
* | Various ModIndex improvementsClifford Wolf2015-02-081-13/+54
* | Added Yosys 0.5 ChangelogClifford Wolf2015-02-081-4/+46
* | Various updates to CodingReadmeClifford Wolf2015-02-081-10/+13
* | Added equiv_addClifford Wolf2015-02-082-0/+90
* | Ignore explicit assignments to constants in HDL codeClifford Wolf2015-02-081-0/+14
* | Fixed a bug with autowire bit sizeClifford Wolf2015-02-081-9/+3
* | fixed typoClifford Wolf2015-02-081-1/+1
* | Added "yosys-config --build modname.so cppsources.."Clifford Wolf2015-02-081-2/+12
* | Added SigSpec::has_const()Clifford Wolf2015-02-082-0/+13
* | Cleanup in add_share_file make macroClifford Wolf2015-02-081-3/+3