| Commit message (Expand) | Author | Age | Files | Lines | ||
|---|---|---|---|---|---|---|
| ... | ||||||
| | | | | | | * | | | | | | | | | | | | | | | | | Change pmgen default rule to reject, switch peepopt behavior to accept | Clifford Wolf | 2019-08-15 | 5 | -7/+5 | |
| | | | | | | * | | | | | | | | | | | | | | | | | Add demo_reduce pass to demonstrace recursive pattern matching | Clifford Wolf | 2019-08-15 | 4 | -0/+187 | |
| | | | | | | * | | | | | | | | | | | | | | | | | Improvements in pmgen for recursive patterns | Clifford Wolf | 2019-08-15 | 5 | -26/+137 | |
| * | | | | | | | | | | | | | | | | | | | | | | | xilinx_dsp to be sensitive to keep attribute | Eddie Hung | 2019-08-15 | 1 | -1/+14 | |
| * | | | | | | | | | | | | | | | | | | | | | | | Simplify | Eddie Hung | 2019-08-15 | 1 | -4/+2 | |
| * | | | | | | | | | | | | | | | | | | | | | | | Merge remote-tracking branch 'origin/master' into xc7dsp | Eddie Hung | 2019-08-15 | 26 | -2242/+2277 | |
| |\| | | | | | | | | | | | | | | | | | | | | | | ||||||
| | * | | | | | | | | | | | | | | | | | | | | | | Merge pull request #1297 from YosysHQ/eddie/fix_1284_again | Eddie Hung | 2019-08-15 | 1 | -2/+2 | |
| | |\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ | | |_|_|_|_|/ / / / / / / / / / / / / / / / / | |/| | | | | | | | | | | | | | | | | | | | | | ||||||
| | | * | | | | | | | | | | | | | | | | | | | | | Merge remote-tracking branch 'origin/master' into eddie/fix_1284_again | Eddie Hung | 2019-08-15 | 25 | -2240/+2275 | |
| | | |\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ | | |/ / / / / / / / / / / / / / / / / / / / / | |/| | | | | | | | | | | | | | | | | | | | | | ||||||
| | * | | | | | | | | | | | | | | | | | | | | | | Merge pull request #1275 from YosysHQ/clifford/ids | Clifford Wolf | 2019-08-15 | 23 | -2205/+2269 | |
| | |\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ | ||||||
| | | * \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ | Merge branch 'master' into clifford/ids | Clifford Wolf | 2019-08-15 | 5 | -126/+244 | |
| | | |\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ | | |/ / / / / / / / / / / / / / / / / / / / / / | |/| | | | | | | | | | | | | | | | | | | | | | | ||||||
| | * | | | | | | | | | | | | | | | | | | | | | | | Merge pull request #1295 from YosysHQ/eddie/fix_travis | Clifford Wolf | 2019-08-15 | 2 | -35/+6 | |
| | |\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ | ||||||
| | | * | | | | | | | | | | | | | | | | | | | | | | | Revert earliest to gcc-4.8, compile iverilog with default compiler | Eddie Hung | 2019-08-14 | 2 | -3/+3 | |
| | | * | | | | | | | | | | | | | | | | | | | | | | | Revert "Bump to gcc-5 as `__warn_memset_zero_len' symbol not in 16.04!?!" | Eddie Hung | 2019-08-14 | 1 | -5/+3 | |
| | | * | | | | | | | | | | | | | | | | | | | | | | | Remove .0 from clang-8.0 | Eddie Hung | 2019-08-14 | 1 | -2/+2 | |
| | | * | | | | | | | | | | | | | | | | | | | | | | | Bump to gcc-5 as `__warn_memset_zero_len' symbol not in 16.04!?! | Eddie Hung | 2019-08-14 | 1 | -3/+5 | |
| | | * | | | | | | | | | | | | | | | | | | | | | | | bionic -> xenial as its on whitelist | Eddie Hung | 2019-08-14 | 1 | -1/+1 | |
| | | * | | | | | | | | | | | | | | | | | | | | | | | Bump gcc from 4.8 to 4.9 as undefined reference | Eddie Hung | 2019-08-14 | 1 | -36/+7 | |
| | |/ / / / / / / / / / / / / / / / / / / / / / / | ||||||
| | | * | | | | | | | | | | | | | | | | | | | | | | Add YOSYS_NO_IDS_REFCNT configuration macro | Clifford Wolf | 2019-08-11 | 2 | -2/+25 | |
| | | * | | | | | | | | | | | | | | | | | | | | | | Use ID() in kernel/*, add simple ID:: hack (to be improved upon later) | Clifford Wolf | 2019-08-11 | 10 | -1160/+1182 | |
| | | * | | | | | | | | | | | | | | | | | | | | | | More improvements and cleanups in IdString subsystem | Clifford Wolf | 2019-08-11 | 3 | -43/+54 | |
| | | * | | | | | | | | | | | | | | | | | | | | | | Use ID() macro in all of passes/opt/ | Clifford Wolf | 2019-08-11 | 12 | -998/+998 | |
| | | * | | | | | | | | | | | | | | | | | | | | | | Improve API of ID() macro | Clifford Wolf | 2019-08-11 | 1 | -2/+10 | |
| | | | |_|_|/ / / / / / / / / / / / / / / / / / | | |/| | | | | | | | | | | | | | | | | | | | | ||||||
| | | | * | | | | | | | | | | | | | | | | | | | | AND with an inverted input, causes X{,N}OR output to be inverted too | Eddie Hung | 2019-08-14 | 1 | -2/+2 | |
| | | | * | | | | | | | | | | | | | | | | | | | | Revert "Only sort leaves on non-ANDNOT/ORNOT cells" | Eddie Hung | 2019-08-14 | 1 | -7/+6 | |
| | | | * | | | | | | | | | | | | | | | | | | | | Only sort leaves on non-ANDNOT/ORNOT cells | Eddie Hung | 2019-08-14 | 1 | -6/+7 | |
| | | |/ / / / / / / / / / / / / / / / / / / / | |/| | | | | | | | | | | | | | | | | | | | | ||||||
| | * | | | | | | | | | | | | | | | | | | | | | Merge pull request #1294 from YosysHQ/revert-1288-eddie/fix_1284 | Eddie Hung | 2019-08-14 | 1 | -4/+8 | |
| | |\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ | ||||||
| | | * | | | | | | | | | | | | | | | | | | | | | Revert "Since $_ANDNOT_ is not symmetric, do not sort leaves" | Eddie Hung | 2019-08-14 | 1 | -4/+8 | |
| | |/ / / / / / / / / / / / / / / / / / / / / | ||||||
| | * | | | | | | | | | | | | | | | | | | | | | Merge pull request #1288 from YosysHQ/eddie/fix_1284 | Eddie Hung | 2019-08-13 | 1 | -8/+4 | |
| | |\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ | | |_|_|_|/ / / / / / / / / / / / / / / / / | |/| | | | | | | | | | | | | | | | | | | | | ||||||
| | | * | | | | | | | | | | | | | | | | | | | | Since $_ANDNOT_ is not symmetric, do not sort leaves | Eddie Hung | 2019-08-12 | 1 | -8/+4 | |
| | |/ / / / / / / / / / / / / / / / / / / / | ||||||
| * | | | | | | | | | | | | | | | | | | | | | Merge branch 'xc7dsp' of github.com:YosysHQ/yosys into xc7dsp | Eddie Hung | 2019-08-15 | 1 | -1/+5 | |
| |\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ | | |_|_|_|_|/ / / / / / / / / / / / / / / | |/| | | | | | | | | | | | | | | | | | | | ||||||
| | * | | | | | | | | | | | | | | | | | | | | xilinx: Rework labels for faster Verilator testing | David Shah | 2019-08-13 | 1 | -1/+5 | |
| * | | | | | | | | | | | | | | | | | | | | | ffH -> ffFJKG | Eddie Hung | 2019-08-15 | 2 | -15/+15 | |
| * | | | | | | | | | | | | | | | | | | | | | Fixes for reverting SigSpec helper functions | Eddie Hung | 2019-08-14 | 2 | -10/+14 | |
| * | | | | | | | | | | | | | | | | | | | | | Perform C -> PCIN optimisation after pattern matcher | Eddie Hung | 2019-08-13 | 2 | -19/+72 | |
| * | | | | | | | | | | | | | | | | | | | | | Revert changes to RTLIL::SigSpec methods | Eddie Hung | 2019-08-13 | 4 | -15/+36 | |
| * | | | | | | | | | | | | | | | | | | | | | Only swap ports if $mul and not $__mul | Eddie Hung | 2019-08-13 | 1 | -1/+1 | |
| * | | | | | | | | | | | | | | | | | | | | | Add assign PCOUT = P to DSP48E1 | Eddie Hung | 2019-08-13 | 1 | -0/+2 | |
| * | | | | | | | | | | | | | | | | | | | | | Rename to XilinxDspPass | Eddie Hung | 2019-08-13 | 1 | -3/+3 | |
| * | | | | | | | | | | | | | | | | | | | | | Add DSP_A_MAXWIDTH_PARTIAL, refactor | Eddie Hung | 2019-08-13 | 2 | -145/+111 | |
| |/ / / / / / / / / / / / / / / / / / / / | ||||||
| * | | | | | | | | | | | | | | | | | | | | Merge remote-tracking branch 'origin/master' into xc7dsp | Eddie Hung | 2019-08-12 | 76 | -551/+823 | |
| |\| | | | | | | | | | | | | | | | | | | | ||||||
| | * | | | | | | | | | | | | | | | | | | | Merge pull request #1152 from 1138-4EB/feat-docker | Serge Bazanski | 2019-08-12 | 1 | -25/+49 | |
| | |\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ | ||||||
| | | * | | | | | | | | | | | | | | | | | | | dockerfile: use 'python:3-slim-buster' base image | 1138-4EB | 2019-08-07 | 1 | -5/+8 | |
| | | * | | | | | | | | | | | | | | | | | | | dockerfile: use PREFIX instead of cp | 1138-4EB | 2019-08-07 | 1 | -5/+8 | |
| | | * | | | | | | | | | | | | | | | | | | | dockerfile: add ARG IMAGE, use three stages | 1138-4EB | 2019-08-07 | 1 | -13/+27 | |
| | | * | | | | | | | | | | | | | | | | | | | dockerfile: reduce number of COPY layers | 1138-4EB | 2019-08-07 | 1 | -7/+4 | |
| | | * | | | | | | | | | | | | | | | | | | | dockerfile: DEBIAN_FRONTEND should not be permanent | 1138-4EB | 2019-08-07 | 1 | -9/+16 | |
| | * | | | | | | | | | | | | | | | | | | | | Merge pull request #1277 from YosysHQ/eddie/fix_1262 | Eddie Hung | 2019-08-11 | 2 | -66/+189 | |
| | |\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ | | |_|/ / / / / / / / / / / / / / / / / / | |/| | | | | | | | | | | | | | | | | | | | ||||||
| | | * | | | | | | | | | | | | | | | | | | | Merge remote-tracking branch 'origin/master' into eddie/fix_1262 | Eddie Hung | 2019-08-11 | 91 | -640/+759 | |
| | | |\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ | | |/ / / / / / / / / / / / / / / / / / / | |/| | | | | | | | | | | | | | | | | | | | ||||||
| | * | | | | | | | | | | | | | | | | | | | | Merge pull request #1280 from YosysHQ/revert-1266-eddie/ice40_full_adder | Eddie Hung | 2019-08-10 | 20 | -180/+180 | |
| | |\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ | ||||||
| | | * | | | | | | | | | | | | | | | | | | | | Revert "Wrap SB_LUT+SB_CARRY into $__ICE40_CARRY_WRAPPER" | David Shah | 2019-08-10 | 20 | -180/+180 | |
| | |/ / / / / / / / / / / / / / / / / / / / | ||||||
 |
index : iCE40/yosys | |
| [no description] |
| aboutsummaryrefslogtreecommitdiffstats |