| Commit message (Expand) | Author | Age | Files | Lines | ||
|---|---|---|---|---|---|---|
| ... | ||||||
| | * | | | Changed the Makefile to have an explicit `CXXSTD` parameter which allows for ... | Aki Van Ness | 2021-10-31 | 1 | -10/+11 | |
| * | | | | Removed semicolon from macro | Miodrag Milanovic | 2021-11-05 | 1 | -1/+1 | |
| * | | | | Bump version | github-actions[bot] | 2021-11-03 | 1 | -1/+1 | |
| * | | | | flatten: Keep sigmap around between flatten_cell invocations. | Marcelina Kościelnicka | 2021-11-02 | 1 | -3/+4 | |
| * | | | | Bump version | github-actions[bot] | 2021-11-02 | 1 | -1/+1 | |
| * | | | | Merge pull request #3068 from YosysHQ/claire/verific_cfg | Claire Xen | 2021-11-01 | 1 | -2/+75 | |
| |\ \ \ \ | ||||||
| | * | | | | Add "verific -cfg" command | Claire Xenia Wolf | 2021-11-01 | 1 | -2/+75 | |
| |/ / / / | ||||||
| * / / / | Bump version | github-actions[bot] | 2021-11-01 | 1 | -1/+1 | |
| |/ / / | ||||||
| * | | | Merge pull request #3066 from YosysHQ/claire/verific_gclk | Claire Xen | 2021-10-31 | 1 | -12/+67 | |
| |\ \ \ | ||||||
| | * | | | Fix verific gclk handling for async-load FFs | Claire Xenia Wolf | 2021-10-31 | 1 | -12/+67 | |
| |/ / / | ||||||
| * | | | Bump version | github-actions[bot] | 2021-10-30 | 1 | -1/+1 | |
| * | | | Add missing items in CHANGELOG | Miodrag Milanovic | 2021-10-29 | 1 | -0/+6 | |
| * | | | Update command reference part of manual | Miodrag Milanovic | 2021-10-29 | 1 | -340/+1444 | |
| * | | | Bump version | github-actions[bot] | 2021-10-28 | 1 | -1/+1 | |
| * | | | Merge pull request #3063 from YosysHQ/micko/verific_aldff | Miodrag Milanović | 2021-10-27 | 2 | -8/+1 | |
| |\ \ \ | ||||||
| | * | | | Enable async load dff emit by default in Verific | Miodrag Milanovic | 2021-10-27 | 1 | -1/+1 | |
| | * | | | Revert "Compile option for enabling async load verific support" | Miodrag Milanovic | 2021-10-27 | 2 | -8/+1 | |
| * | | | | ecp5: Add support for mapping aldff. | Marcelina Kościelnicka | 2021-10-27 | 2 | -13/+13 | |
| |/ / / | ||||||
| * | | | proc_dff: Emit $aldff. | Marcelina Kościelnicka | 2021-10-27 | 1 | -32/+7 | |
| * | | | dfflegalize: Add tests for aldff lowering. | Marcelina Kościelnicka | 2021-10-27 | 2 | -0/+240 | |
| * | | | dfflegalize: Add tests targetting aldff. | Marcelina Kościelnicka | 2021-10-27 | 7 | -7/+320 | |
| * | | | dfflegalize: Refactor, add aldff support. | Marcelina Kościelnicka | 2021-10-27 | 12 | -1053/+1137 | |
| * | | | Bump version | github-actions[bot] | 2021-10-27 | 1 | -1/+1 | |
| * | | | verilog: use derived module info to elaborate cell connections | Zachary Snow | 2021-10-25 | 15 | -42/+397 | |
| * | | | Split out logic for reprocessing an AstModule | Rupert Swarbrick | 2021-10-25 | 5 | -28/+61 | |
| * | | | Bump version | github-actions[bot] | 2021-10-26 | 1 | -1/+1 | |
| * | | | Compile option for enabling async load verific support | Miodrag Milanovic | 2021-10-25 | 2 | -1/+8 | |
| * | | | Bump version | github-actions[bot] | 2021-10-22 | 1 | -1/+1 | |
| * | | | Change implicit conversions from bool to Sig* to explicit. | Marcelina Kościelnicka | 2021-10-21 | 2 | -6/+8 | |
| * | | | Merge pull request #3057 from YosysHQ/claire/verific_latches | Claire Xen | 2021-10-21 | 1 | -4/+61 | |
| |\ \ \ | ||||||
| | * | | | Fix verific.cc PRIM_DLATCH handling | Claire Xenia Wolf | 2021-10-21 | 1 | -1/+7 | |
| | * | | | Initial Verific impoter support for {PRIM,WIDE_OPER}_DLATCH{,RS} | Claire Xenia Wolf | 2021-10-21 | 1 | -4/+55 | |
| |/ / / | ||||||
| * | | | extract_reduce: Refactor and fix input signal construction. | Marcelina Kościelnicka | 2021-10-21 | 2 | -63/+46 | |
| * | | | Bump version | github-actions[bot] | 2021-10-21 | 1 | -1/+1 | |
| * | | | If verific have vhdl lib it is required by other libs | Miodrag Milanovic | 2021-10-20 | 1 | -0/+4 | |
| * | | | Forgot to remove from main list | Miodrag Milanovic | 2021-10-20 | 1 | -1/+1 | |
| * | | | Option to disable verific VHDL support | Miodrag Milanovic | 2021-10-20 | 3 | -11/+50 | |
| * | | | Bump version | github-actions[bot] | 2021-10-20 | 1 | -1/+1 | |
| * | | | Fixed Verific parser error in ice40 cell library | Claire Xenia Wolf | 2021-10-19 | 1 | -22/+62 | |
| * | | | Merge pull request #3045 from galibert/master | Miodrag Milanović | 2021-10-19 | 1 | -0/+18 | |
| |\ \ \ | ||||||
| | * | | | CycloneV: Add (passthrough) support for cyclonev_oscillator | Olivier Galibert | 2021-10-17 | 1 | -1/+11 | |
| | * | | | CycloneV: Add (passthrough) support for cyclonev_hps_interface_mpu_general_pu... | Olivier Galibert | 2021-10-17 | 1 | -0/+8 | |
| * | | | | Fixes in vcdcd.pl for newer Perl versions | Claire Xenia Wolf | 2021-10-19 | 1 | -3/+3 | |
| * | | | | Bump version | github-actions[bot] | 2021-10-18 | 1 | -1/+1 | |
| * | | | | dfflegalize: remove redundant check for initialized dlatch | Paul Annesley | 2021-10-17 | 1 | -4/+0 | |
| |/ / / | ||||||
| * | | | Bump version | github-actions[bot] | 2021-10-16 | 1 | -1/+1 | |
| * | | | Merge pull request #3044 from YosysHQ/micko/verific_bufif1 | Claire Xen | 2021-10-15 | 1 | -2/+2 | |
| |\ \ \ | ||||||
| | * | | | Support PRIM_BUFIF1 primitive | Miodrag Milanovic | 2021-10-14 | 1 | -2/+2 | |
| |/ / / | ||||||
| * | | | Bump version | github-actions[bot] | 2021-10-12 | 1 | -1/+1 | |
| * | | | Merge pull request #3039 from YosysHQ/claire/verific_aldff | Claire Xen | 2021-10-11 | 2 | -1/+91 | |
| |\ \ \ | ||||||
 |
index : iCE40/yosys | |
| [no description] |
| aboutsummaryrefslogtreecommitdiffstats |