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-rw-r--r--tests/various/dynamic_part_select/latch_002.v13
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diff --git a/tests/various/dynamic_part_select/latch_002.v b/tests/various/dynamic_part_select/latch_002.v
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+++ b/tests/various/dynamic_part_select/latch_002.v
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+`default_nettype none
+module latch_002
+ (dword, sel, st, vect);
+ output reg [63:0] dword;
+ input wire [7:0] vect;
+ input wire [7:0] sel;
+ input wire st;
+
+ always @(*) begin
+ if (st)
+ dword[8*sel +:8] <= vect[7:0];
+ end
+endmodule // latch_002