diff options
Diffstat (limited to 'tests/simple/xfirrtl')
| -rw-r--r-- | tests/simple/xfirrtl | 29 |
1 files changed, 29 insertions, 0 deletions
diff --git a/tests/simple/xfirrtl b/tests/simple/xfirrtl new file mode 100644 index 000000000..10063d2c2 --- /dev/null +++ b/tests/simple/xfirrtl @@ -0,0 +1,29 @@ +# This file contains the names of verilog files to exclude from verilog to FIRRTL regression tests due to known failures. +arraycells.v inst id[0] of +defvalue.sv Initial value not supported +dff_different_styles.v +dff_init.v Initial value not supported +generate.v combinational loop +hierdefparam.v inst id[0] of +i2c_master_tests.v $adff +implicit_ports.v not fully initialized +macros.v drops modules +mem2reg.v drops modules +mem_arst.v $adff +memory.v $adff +multiplier.v inst id[0] of +muxtree.v drops modules +omsp_dbg_uart.v $adff +partsel.v drops modules +process.v drops modules +realexpr.v drops modules +retime.v Initial value (11110101) for (retime_test.ff) not supported +scopes.v original verilog issues ( -x where x isn't declared signed) +sincos.v $adff +specify.v no code (empty module generates error +subbytes.v $adff +task_func.v drops modules +values.v combinational loop +wandwor.v Invalid connect to an expression that is not a reference or a WritePort. +vloghammer.v combinational loop +wreduce.v original verilog issues ( -x where x isn't declared signed) |