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Diffstat (limited to 'tests/simple/signed_full_slice.v')
-rw-r--r-- | tests/simple/signed_full_slice.v | 29 |
1 files changed, 29 insertions, 0 deletions
diff --git a/tests/simple/signed_full_slice.v b/tests/simple/signed_full_slice.v new file mode 100644 index 000000000..f8a331578 --- /dev/null +++ b/tests/simple/signed_full_slice.v @@ -0,0 +1,29 @@ +module pass_through_a( + input wire [31:0] inp, + output wire [31:0] out +); + assign out[31:0] = inp[31:0]; +endmodule + +module top_a( + input wire signed [31:0] inp, + output wire signed [31:0] out +); + pass_through_a pt(inp[31:0], out[31:0]); +endmodule + +// tests both module declaration orderings + +module top_b( + input wire signed [31:0] inp, + output wire signed [31:0] out +); + pass_through_b pt(inp[31:0], out[31:0]); +endmodule + +module pass_through_b( + input wire [31:0] inp, + output wire [31:0] out +); + assign out[31:0] = inp[31:0]; +endmodule |