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Diffstat (limited to 'tests/ice40/mul.ys')
| -rw-r--r-- | tests/ice40/mul.ys | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/tests/ice40/mul.ys b/tests/ice40/mul.ys index adf1b3211..aec7d0b1f 100644 --- a/tests/ice40/mul.ys +++ b/tests/ice40/mul.ys @@ -1,6 +1,5 @@ read_verilog mul.v hierarchy -top top -#synth -flatten -run coarse # technology-independent coarse grained synthesis equiv_opt -assert -map +/ice40/cells_sim.v synth_ice40 -dsp # equivalency check same as technology-dependent fine-grained synthesis design -load postopt # load the post-opt design (otherwise equiv_opt loads the pre-opt design) cd top # Constrain all select calls below inside the top module |