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Diffstat (limited to 'tests/ice40/adffs.ys')
| -rw-r--r-- | tests/ice40/adffs.ys | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/tests/ice40/adffs.ys b/tests/ice40/adffs.ys index aee8cd6b4..d58ce1a82 100644 --- a/tests/ice40/adffs.ys +++ b/tests/ice40/adffs.ys @@ -1,8 +1,11 @@ read_verilog adffs.v proc -dff2dffe -synth_ice40 -select -assert-count 2 t:SB_DFFR +async2sync +synth -flatten -run coarse # technology-independent coarse grained synthesis +equiv_opt -assert -map +/ice40/cells_sim.v synth_ice40 # equivalency check same as technology-dependent fine-grained synthesis +design -load postopt # load the post-opt design (otherwise equiv_opt loads the pre-opt design) +cd top # Constrain all select calls below inside the top module +select -assert-count 1 t:SB_DFF select -assert-count 1 t:SB_DFFE select -assert-count 4 t:SB_LUT4 #select -assert-none t:SB_LUT4 t:SB_DFFR t:SB_DFFE t:$_DFFSR_NPP_ t:$_DFFSR_PPP_ %% t:* %D |