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Diffstat (limited to 'tests/ecp5/logic.ys')
| -rw-r--r-- | tests/ecp5/logic.ys | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/tests/ecp5/logic.ys b/tests/ecp5/logic.ys index fc5e5b1d8..34125fea9 100644 --- a/tests/ecp5/logic.ys +++ b/tests/ecp5/logic.ys @@ -1,7 +1,7 @@ read_verilog logic.v hierarchy -top top -equiv_opt -assert -map +/ice40/cells_sim.v synth_ice40 # equivalency check +equiv_opt -assert -map +/ecp5/cells_sim.v synth_ecp5 # equivalency check design -load postopt # load the post-opt design (otherwise equiv_opt loads the pre-opt design) cd top # Constrain all select calls below inside the top module -select -assert-count 9 t:SB_LUT4 -select -assert-none t:SB_LUT4 %% t:* %D +select -assert-count 9 t:LUT4 +select -assert-none t:LUT4 %% t:* %D |