4 files changed, 25 insertions, 313 deletions
diff --git a/techlibs/ice40/abc_hx.box b/techlibs/ice40/abc_hx.box
index a0655643d..f8e12b527 100644
--- a/techlibs/ice40/abc_hx.box
+++ b/techlibs/ice40/abc_hx.box
@@ -1,113 +1,17 @@
 # From https://github.com/cliffordwolf/icestorm/blob/be0bca0/icefuzz/timings_hx8k.txt
 
 # NB: Inputs/Outputs must be ordered alphabetically
+#     (with exceptions for carry in/out)
 
-# Inputs: C D
-# Outputs: Q
-SB_DFF 1 0 2 1
-- -
-
-# Inputs: C D E
-# Outputs: Q
-SB_DFFE 2 0 3 1
-- - -
-
-# Inputs: C D R
-# Outputs: Q
-SB_DFFSR 3 0 3 1
-- - -
-
-# Inputs: C D R
-# Outputs: Q
-SB_DFFR 4 0 3 1
-- - -
-
-# Inputs: C D S
-# Outputs: Q
-SB_DFFSS 5 0 3 1
-- - -
-
-# Inputs: C D S
-# Outputs: Q
-SB_DFFS 6 0 3 1
-- - -
-
-# Inputs: C D E R
-# Outputs: Q
-SB_DFFESR 7 0 4 1
-- - - -
-
-# Inputs: C D E R
-# Outputs: Q
-SB_DFFER 8 0 4 1
-- - - -
-
-# Inputs: C D E S
-# Outputs: Q
-SB_DFFESS 9 0 4 1
-- - - -
-
-# Inputs: C D E S
-# Outputs: Q
-SB_DFFES 10 0 4 1
-- - - -
-
-# Inputs: C D
-# Outputs: Q
-SB_DFFN 11 0 2 1
-- -
-
-# Inputs: C D E
-# Outputs: Q
-SB_DFFNE 12 0 3 1
-- - -
-
-# Inputs: C D R
-# Outputs: Q
-SB_DFFNSR 13 0 3 1
-- - -
-
-# Inputs: C D R
-# Outputs: Q
-SB_DFFNR 14 0 3 1
-- - -
-
-# Inputs: C D S
-# Outputs: Q
-SB_DFFNSS 15 0 3 1
-- - -
-
-# Inputs: C D S
-# Outputs: Q
-SB_DFFNS 16 0 3 1
-- - -
-
-# Inputs: C D E R
-# Outputs: Q
-SB_DFFNESR 17 0 4 1
-- - - -
-
-# Inputs: C D E R
-# Outputs: Q
-SB_DFFNER 18 0 4 1
-- - - -
-
-# Inputs: C D E S
-# Outputs: Q
-SB_DFFNESS 19 0 4 1
-- - - -
-
-# Inputs: C D E S
-# Outputs: Q
-SB_DFFNES 20 0 4 1
-- - - -
-
-# Inputs: CI I0 I1
+# Inputs: I0 I1 CI
 # Outputs: CO
-SB_CARRY 21 1 3 1
-126 259 231
+#   (NB: carry chain input/output must be last
+#        input/output and have been moved there
+#        overriding the alphabetical ordering)
+SB_CARRY 1 1 3 1
+259 231 126
 
 # Inputs: I0 I1 I2 I3
 # Outputs: O
-SB_LUT4 22 1 4 1
+SB_LUT4 2 1 4 1
 449 400 379 316
diff --git a/techlibs/ice40/abc_lp.box b/techlibs/ice40/abc_lp.box
index eb1cd0937..fbe4c56e6 100644
--- a/techlibs/ice40/abc_lp.box
+++ b/techlibs/ice40/abc_lp.box
@@ -1,113 +1,17 @@
 # From https://github.com/cliffordwolf/icestorm/blob/be0bca0/icefuzz/timings_lp8k.txt
 
 # NB: Inputs/Outputs must be ordered alphabetically
-
-# Inputs: C D
-# Outputs: Q
-SB_DFF 1 0 2 1
-- -
-
-# Inputs: C D E
-# Outputs: Q
-SB_DFFE 2 0 3 1
-- - -
-
-# Inputs: C D R
-# Outputs: Q
-SB_DFFSR 3 0 3 1
-- - -
-
-# Inputs: C D R
-# Outputs: Q
-SB_DFFR 4 0 3 1
-- - -
-
-# Inputs: C D S
-# Outputs: Q
-SB_DFFSS 5 0 3 1
-- - -
-
-# Inputs: C D S
-# Outputs: Q
-SB_DFFS 6 0 3 1
-- - -
-
-# Inputs: C D E R
-# Outputs: Q
-SB_DFFESR 7 0 4 1
-- - - -
-
-# Inputs: C D E R
-# Outputs: Q
-SB_DFFER 8 0 4 1
-- - - -
-
-# Inputs: C D E S
-# Outputs: Q
-SB_DFFESS 9 0 4 1
-- - - -
-
-# Inputs: C D E S
-# Outputs: Q
-SB_DFFES 10 0 4 1
-- - - -
-
-# Inputs: C D
-# Outputs: Q
-SB_DFFN 11 0 2 1
-- -
-
-# Inputs: C D E
-# Outputs: Q
-SB_DFFNE 12 0 3 1
-- - -
-
-# Inputs: C D R
-# Outputs: Q
-SB_DFFNSR 13 0 3 1
-- - -
-
-# Inputs: C D R
-# Outputs: Q
-SB_DFFNR 14 0 3 1
-- - -
-
-# Inputs: C D S
-# Outputs: Q
-SB_DFFNSS 15 0 3 1
-- - -
-
-# Inputs: C D S
-# Outputs: Q
-SB_DFFNS 16 0 3 1
-- - -
-
-# Inputs: C D E R
-# Outputs: Q
-SB_DFFNESR 17 0 4 1
-- - - -
-
-# Inputs: C D E R
-# Outputs: Q
-SB_DFFNER 18 0 4 1
-- - - -
-
-# Inputs: C D E S
-# Outputs: Q
-SB_DFFNESS 19 0 4 1
-- - - -
-
-# Inputs: C D E S
-# Outputs: Q
-SB_DFFNES 20 0 4 1
-- - - -
+#     (with exceptions for carry in/out)
 
 # Inputs: CI I0 I1
 # Outputs: CO
-SB_CARRY 21 1 3 1
-186 675 609
+#   (NB: carry chain input/output must be last
+#        input/output and have been moved there
+#        overriding the alphabetical ordering)
+SB_CARRY 1 1 3 1
+675 609 186 
 
 # Inputs: I0 I1 I2 I3
 # Outputs: O
-SB_LUT4 22 1 4 1
+SB_LUT4 2 1 4 1
 661 589 558 465
diff --git a/techlibs/ice40/abc_u.box b/techlibs/ice40/abc_u.box
index 3b5834e40..f44deabc4 100644
--- a/techlibs/ice40/abc_u.box
+++ b/techlibs/ice40/abc_u.box
@@ -1,113 +1,17 @@
 # From https://github.com/cliffordwolf/icestorm/blob/be0bca0/icefuzz/timings_up5k.txt
 
 # NB: Inputs/Outputs must be ordered alphabetically
+#     (with exceptions for carry in/out)
 
-# Inputs: C D
-# Outputs: Q
-SB_DFF 1 0 2 1
-- -
-
-# Inputs: C D E
-# Outputs: Q
-SB_DFFE 2 0 3 1
-- - -
-
-# Inputs: C D R
-# Outputs: Q
-SB_DFFSR 3 0 3 1
-- - -
-
-# Inputs: C D R
-# Outputs: Q
-SB_DFFR 4 0 3 1
-- - -
-
-# Inputs: C D S
-# Outputs: Q
-SB_DFFSS 5 0 3 1
-- - -
-
-# Inputs: C D S
-# Outputs: Q
-SB_DFFS 6 0 3 1
-- - -
-
-# Inputs: C D E R
-# Outputs: Q
-SB_DFFESR 7 0 4 1
-- - - -
-
-# Inputs: C D E R
-# Outputs: Q
-SB_DFFER 8 0 4 1
-- - - -
-
-# Inputs: C D E S
-# Outputs: Q
-SB_DFFESS 9 0 4 1
-- - - -
-
-# Inputs: C D E S
-# Outputs: Q
-SB_DFFES 10 0 4 1
-- - - -
-
-# Inputs: C D
-# Outputs: Q
-SB_DFFN 11 0 2 1
-- -
-
-# Inputs: C D E
-# Outputs: Q
-SB_DFFNE 12 0 3 1
-- - -
-
-# Inputs: C D R
-# Outputs: Q
-SB_DFFNSR 13 0 3 1
-- - -
-
-# Inputs: C D R
-# Outputs: Q
-SB_DFFNR 14 0 3 1
-- - -
-
-# Inputs: C D S
-# Outputs: Q
-SB_DFFNSS 15 0 3 1
-- - -
-
-# Inputs: C D S
-# Outputs: Q
-SB_DFFNS 16 0 3 1
-- - -
-
-# Inputs: C D E R
-# Outputs: Q
-SB_DFFNESR 17 0 4 1
-- - - -
-
-# Inputs: C D E R
-# Outputs: Q
-SB_DFFNER 18 0 4 1
-- - - -
-
-# Inputs: C D E S
-# Outputs: Q
-SB_DFFNESS 19 0 4 1
-- - - -
-
-# Inputs: C D E S
-# Outputs: Q
-SB_DFFNES 20 0 4 1
-- - - -
-
-# Inputs: CI I0 I1
+# Inputs: I0 I1 CI
 # Outputs: CO
-SB_CARRY 21 1 3 1
-278 675 609
+#   (NB: carry chain input/output must be last
+#        input/output and have been moved there
+#        overriding the alphabetical ordering)
+SB_CARRY 1 1 3 1
+675 609 278
 
 # Inputs: I0 I1 I2 I3
 # Outputs: O
-SB_LUT4 22 1 4 1
+SB_LUT4 2 1 4 1
 1285 1231 1205 874
diff --git a/techlibs/ice40/cells_sim.v b/techlibs/ice40/cells_sim.v
index 031afa85c..317ae2c1f 100644
--- a/techlibs/ice40/cells_sim.v
+++ b/techlibs/ice40/cells_sim.v
@@ -127,7 +127,7 @@ endmodule
 
 // SiliconBlue Logic Cells
 
-(* abc_box_id = 22, lib_whitebox *)
+(* abc_box_id = 2, lib_whitebox *)
 module SB_LUT4 (output O, input I0, I1, I2, I3);
 	parameter [15:0] LUT_INIT = 0;
 	wire [7:0] s3 = I3 ? LUT_INIT[15:8] : LUT_INIT[7:0];
@@ -136,7 +136,7 @@ module SB_LUT4 (output O, input I0, I1, I2, I3);
 	assign O = I0 ? s1[1] : s1[0];
 endmodule
 
-(* abc_box_id = 21, abc_carry, lib_whitebox *)
+(* abc_box_id = 1, abc_carry, lib_whitebox *)
 module SB_CARRY ((* abc_carry_out *) output CO, input I0, I1, (* abc_carry_in *) input CI);
 	assign CO = (I0 && I1) || ((I0 || I1) && CI);
 endmodule