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-rw-r--r--examples/smtbmc/demo1.v3
1 files changed, 2 insertions, 1 deletions
diff --git a/examples/smtbmc/demo1.v b/examples/smtbmc/demo1.v
index 2e628b7da..b1e505bdd 100644
--- a/examples/smtbmc/demo1.v
+++ b/examples/smtbmc/demo1.v
@@ -1,5 +1,5 @@
module demo1(input clk, input addtwo, output iseven);
- reg [3:0] cnt = 0;
+ reg [3:0] cnt;
wire [3:0] next_cnt;
inc inc_inst (addtwo, iseven, cnt, next_cnt);
@@ -8,6 +8,7 @@ module demo1(input clk, input addtwo, output iseven);
cnt = (iseven ? cnt == 10 : cnt == 11) ? 0 : next_cnt;
assert property (cnt != 15);
+ initial assume (!cnt[3] && !cnt[0]);
// initial predict ((iseven && addtwo) || cnt == 9);
endmodule