diff options
| -rw-r--r-- | techlibs/ice40/cells_sim.v | 24 | ||||
| -rwxr-xr-x | tests/aiger/run-test.sh | 7 |
2 files changed, 30 insertions, 1 deletions
diff --git a/techlibs/ice40/cells_sim.v b/techlibs/ice40/cells_sim.v index b9f381266..523dd8cbe 100644 --- a/techlibs/ice40/cells_sim.v +++ b/techlibs/ice40/cells_sim.v @@ -1001,6 +1001,30 @@ parameter RGB2_CURRENT = "0b000000"; endmodule (* blackbox *) +module SB_LED_DRV_CUR( + input EN, + output LEDPU +); +endmodule + +(* blackbox *) +module SB_RGB_DRV( + input RGBLEDEN, + input RGB0PWM, + input RGB1PWM, + input RGB2PWM, + input RGBPU, + output RGB0, + output RGB1, + output RGB2 +); +parameter CURRENT_MODE = "0b0"; +parameter RGB0_CURRENT = "0b000000"; +parameter RGB1_CURRENT = "0b000000"; +parameter RGB2_CURRENT = "0b000000"; +endmodule + +(* blackbox *) module SB_I2C( input SBCLKI, input SBRWI, diff --git a/tests/aiger/run-test.sh b/tests/aiger/run-test.sh index e56d0fa80..f52eb4ac1 100755 --- a/tests/aiger/run-test.sh +++ b/tests/aiger/run-test.sh @@ -2,9 +2,14 @@ set -e +# NB: *.aag and *.aig must contain a symbol table naming the primary +# inputs and outputs, otherwise ABC and Yosys will name them +# arbitrarily (and inconsistently with each other). + for aag in *.aag; do # Since ABC cannot read *.aag, read the *.aig instead - # (which would have been created by the reference aig2aig utility) + # (which would have been created by the reference aig2aig utility, + # available from http://fmv.jku.at/aiger/) ../../yosys-abc -c "read -c ${aag%.*}.aig; write ${aag%.*}_ref.v" ../../yosys -p " read_verilog ${aag%.*}_ref.v |