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author | Jakob Wenzel <wenzel@rs.tu-darmstadt.de> | 2019-04-25 15:12:24 +0200 |
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committer | Jakob Wenzel <wenzel@rs.tu-darmstadt.de> | 2019-05-02 09:52:30 +0200 |
commit | 98ffe5fb007c0e0d348f961a4e99d8b2f241eac1 (patch) | |
tree | 02c160103daee334ea809fcff025b2c78c96cc9b /tests | |
parent | 98925f6c4be611434e75f0ccf645a7ef8adcfc63 (diff) | |
download | yosys-98ffe5fb007c0e0d348f961a4e99d8b2f241eac1.tar.gz yosys-98ffe5fb007c0e0d348f961a4e99d8b2f241eac1.tar.bz2 yosys-98ffe5fb007c0e0d348f961a4e99d8b2f241eac1.zip |
fail svinterfaces testcases on yosys error exit
Diffstat (limited to 'tests')
-rwxr-xr-x | tests/svinterfaces/runone.sh | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/tests/svinterfaces/runone.sh b/tests/svinterfaces/runone.sh index 0adecc797..71c2d4976 100755 --- a/tests/svinterfaces/runone.sh +++ b/tests/svinterfaces/runone.sh @@ -11,13 +11,13 @@ echo "" > $STDERRFILE echo -n "Test: ${TESTNAME} -> " +set -e + $PWD/../../yosys -p "read_verilog -sv ${TESTNAME}.sv ; hierarchy -check -top TopModule ; synth ; write_verilog ${TESTNAME}_syn.v" >> $STDOUTFILE >> $STDERRFILE $PWD/../../yosys -p "read_verilog -sv ${TESTNAME}_ref.v ; hierarchy -check -top TopModule ; synth ; write_verilog ${TESTNAME}_ref_syn.v" >> $STDOUTFILE >> $STDERRFILE rm -f a.out reference_result.txt dut_result.txt -set -e - iverilog -g2012 ${TESTNAME}_syn.v iverilog -g2012 ${TESTNAME}_ref_syn.v |