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authorEddie Hung <eddie@fpgeh.com>2019-11-19 16:57:58 -0800
committerEddie Hung <eddie@fpgeh.com>2019-11-19 16:57:58 -0800
commit90c5ca330c5e6c8eb45ad0b755b0049a34dc7534 (patch)
treef1b9be0085c29308ad752e6cfc47cfa6d701e1cd /tests
parent929beda19c24e8e6cb6e87b0ceaa97ad2829abbe (diff)
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Add two tests
Diffstat (limited to 'tests')
-rw-r--r--tests/simple_abc9/abc9.v12
1 files changed, 12 insertions, 0 deletions
diff --git a/tests/simple_abc9/abc9.v b/tests/simple_abc9/abc9.v
index 64b625efe..58596d701 100644
--- a/tests/simple_abc9/abc9.v
+++ b/tests/simple_abc9/abc9.v
@@ -267,3 +267,15 @@ module abc9_test026(output [3:0] o, p);
assign o = { 1'b1, 1'bx };
assign p = { 1'b1, 1'bx, 1'b0 };
endmodule
+
+module abc9_test029(input clk, d, r, output reg q);
+always @(posedge clk or posedge r)
+ if (r) q <= 1'b0;
+ else q <= d;
+endmodule
+
+module abc9_test030(input clk, d, r, output reg q);
+always @(negedge clk or posedge r)
+ if (r) q <= 1'b1;
+ else q <= d;
+endmodule