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| author | whitequark <whitequark@whitequark.org> | 2019-01-02 02:45:49 +0000 |
|---|---|---|
| committer | whitequark <whitequark@whitequark.org> | 2019-01-02 02:45:49 +0000 |
| commit | 8e53d2e0bf3584709cd320447ad5a89a80dcfd94 (patch) | |
| tree | c049d8ae6018c9efe0dec86da5bf180ae75a1bf9 /tests | |
| parent | 4b9f619349e6b7452739631635ab3b5a4d94b522 (diff) | |
| download | yosys-8e53d2e0bf3584709cd320447ad5a89a80dcfd94.tar.gz yosys-8e53d2e0bf3584709cd320447ad5a89a80dcfd94.tar.bz2 yosys-8e53d2e0bf3584709cd320447ad5a89a80dcfd94.zip | |
opt_expr: simplify any unsigned comparisons with all-0 and all-1.
Before this commit, only unsigned comparisons with all-0 would be
simplified. This commit also makes the code handling such comparisons
to be more rigorous and not abort on unexpected input.
Diffstat (limited to 'tests')
| -rw-r--r-- | tests/opt/opt_expr_cmp.v | 11 | ||||
| -rw-r--r-- | tests/opt/opt_expr_cmp.ys | 4 |
2 files changed, 15 insertions, 0 deletions
diff --git a/tests/opt/opt_expr_cmp.v b/tests/opt/opt_expr_cmp.v new file mode 100644 index 000000000..7eb65d531 --- /dev/null +++ b/tests/opt/opt_expr_cmp.v @@ -0,0 +1,11 @@ +module top(...); + input [3:0] a; + output o1 = 4'b0000 > a; + output o2 = 4'b0000 <= a; + output o3 = 4'b1111 < a; + output o4 = 4'b1111 >= a; + output o5 = a < 4'b0000; + output o6 = a >= 4'b0000; + output o7 = a > 4'b1111; + output o8 = a <= 4'b1111; +endmodule diff --git a/tests/opt/opt_expr_cmp.ys b/tests/opt/opt_expr_cmp.ys new file mode 100644 index 000000000..214ce8b11 --- /dev/null +++ b/tests/opt/opt_expr_cmp.ys @@ -0,0 +1,4 @@ +read_verilog opt_expr_cmp.v +equiv_opt -assert opt_expr -fine +design -load postopt +select -assert-count 0 t:$gt t:$ge t:$lt t:$le |