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author | Eddie Hung <eddie@fpgeh.com> | 2021-03-29 22:02:06 -0700 |
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committer | GitHub <noreply@github.com> | 2021-03-29 22:02:06 -0700 |
commit | 8c5f379435a1140a4320cdd4152b60338e45a362 (patch) | |
tree | d786fb9fe02749bb5c2955db44d6459b71e229e5 /tests | |
parent | 55dc5a4e4f7335741d2155dc0183ed4e26e8ddf8 (diff) | |
download | yosys-8c5f379435a1140a4320cdd4152b60338e45a362.tar.gz yosys-8c5f379435a1140a4320cdd4152b60338e45a362.tar.bz2 yosys-8c5f379435a1140a4320cdd4152b60338e45a362.zip |
abc9: uniquify blackboxes like whiteboxes (#2695)
* abc9_ops: uniquify blackboxes too
* abc9_ops: update comment
* abc9_ops: allow bypass for param-less blackboxes
* Add tests
Diffstat (limited to 'tests')
-rw-r--r-- | tests/various/abc9.ys | 57 |
1 files changed, 56 insertions, 1 deletions
diff --git a/tests/various/abc9.ys b/tests/various/abc9.ys index a9880c722..e0add714b 100644 --- a/tests/various/abc9.ys +++ b/tests/various/abc9.ys @@ -90,7 +90,7 @@ $_DFF_N_ ff4(.C(clk), .D(1'b1), .Q(z)); endmodule EOT simplemap -equiv_opt abc9 -lut 4 -dff +equiv_opt -assert abc9 -lut 4 -dff design -load postopt cd abc9_test038 select -assert-count 3 t:$_DFF_N_ @@ -99,3 +99,58 @@ clean select -assert-count 2 a:init select -assert-count 1 w:w a:init %i select -assert-count 1 c:ff4 %co c:ff4 %d %a a:init %i + + +# Check that non-dangling ABC9 black-boxes are preserved +design -reset +read_verilog -specify <<EOT +(* abc9_box, blackbox *) +module mux_with_param(input I0, I1, S, output O); +parameter P = 0; +specify + (I0 => O) = P; + (I1 => O) = P; + (S => O) = P; +endspecify +endmodule + +module abc9_test039(output O); + mux_with_param #(.P(1)) m ( + .I0(1'b1), + .I1(1'b1), + .O(O), + .S(1'b0) + ); +endmodule +EOT +abc9 -lut 4 +cd abc9_test039 +select -assert-count 1 t:mux_with_param + + +# Check that dangling ABC9 black-boxes are swept away +design -reset +read_verilog -specify <<EOT +(* abc9_box, blackbox *) +module mux_with_param(input I0, I1, S, output O); +parameter P = 0; +specify + (I0 => O) = P; + (I1 => O) = P; + (S => O) = P; +endspecify +endmodule + +module abc9_test040(output O); + wire w; + mux_with_param #(.P(1)) m ( + .I0(1'b1), + .I1(1'b1), + .O(w), + .S(1'b0) + ); +endmodule +EOT +abc9 -lut 4 +cd abc9_test040 +select -assert-count 0 t:mux_with_param |