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| author | Clifford Wolf <clifford@clifford.at> | 2019-03-05 15:19:28 -0800 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2019-03-05 15:19:28 -0800 |
| commit | 855b9dc60661f79252d1f49e0a93911ce7b5a9b4 (patch) | |
| tree | 84a1eea62211c9ed70d4e04499e1ecdc4615c2de /tests | |
| parent | 13844c765818b5d8c0d16d62dcc530f688d2c28a (diff) | |
| parent | d6c4dfb9020ee19eebe3adadca89b65627184d81 (diff) | |
| download | yosys-855b9dc60661f79252d1f49e0a93911ce7b5a9b4.tar.gz yosys-855b9dc60661f79252d1f49e0a93911ce7b5a9b4.tar.bz2 yosys-855b9dc60661f79252d1f49e0a93911ce7b5a9b4.zip | |
Merge pull request #852 from ucb-bar/firrtlfixes
Ensure fid() calls make_id() for consistency; tests/simple/dff_init.v fails
Diffstat (limited to 'tests')
| -rw-r--r-- | tests/simple/xfirrtl | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/tests/simple/xfirrtl b/tests/simple/xfirrtl index 5bc75347b..50d693513 100644 --- a/tests/simple/xfirrtl +++ b/tests/simple/xfirrtl @@ -1,6 +1,7 @@ # This file contains the names of verilog files to exclude from verilog to FIRRTL regression tests due to known failures. arraycells.v inst id[0] of dff_different_styles.v +dff_init.v Initial value not supported generate.v combinational loop hierdefparam.v inst id[0] of i2c_master_tests.v $adff |