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author | Eddie Hung <eddie@fpgeh.com> | 2020-05-08 11:07:11 -0700 |
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committer | Eddie Hung <eddie@fpgeh.com> | 2020-05-08 11:07:11 -0700 |
commit | 495acf981547850ac7ad5b765dd215b0c33d59ac (patch) | |
tree | 9642103e5470f106747494140ae6aaa3ac521cee /tests | |
parent | 7f203cb019c56e0eaf3387a5f7b49f266d6dd9c6 (diff) | |
download | yosys-495acf981547850ac7ad5b765dd215b0c33d59ac.tar.gz yosys-495acf981547850ac7ad5b765dd215b0c33d59ac.tar.bz2 yosys-495acf981547850ac7ad5b765dd215b0c33d59ac.zip |
tests: opt_expr tests that depend on consumex
Diffstat (limited to 'tests')
-rw-r--r-- | tests/opt/opt_expr_consumex.ys | 35 |
1 files changed, 35 insertions, 0 deletions
diff --git a/tests/opt/opt_expr_consumex.ys b/tests/opt/opt_expr_consumex.ys new file mode 100644 index 000000000..d4af10f22 --- /dev/null +++ b/tests/opt/opt_expr_consumex.ys @@ -0,0 +1,35 @@ +read_verilog <<EOT +module top(input a, b, output o); +wire tmp; +assign o = tmp | 1'bx; +assign tmp = a & 1'b0; +endmodule +EOT +design -save read +select -assert-count 1 t:$and +select -assert-count 1 t:$or + + +opt_expr +select -assert-none t:$and t:$or +sat -verify -enable_undef -prove o 1'bx + + +design -load read +opt_expr -keepdc +select -assert-none t:$and t:$or +sat -verify -enable_undef -prove o 1'bx + + +design -load read +simplemap +opt_expr -keepdc +select -assert-none t:$_AND_ t:$_OR_ +sat -verify -enable_undef -prove o 1'bx + + +design -load read +simplemap +opt_expr -keepdc +select -assert-none t:$_AND_ t:$_OR_ +sat -verify -enable_undef -prove o 1'bx |