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author | Eddie Hung <eddie@fpgeh.com> | 2019-09-02 12:13:44 -0700 |
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committer | Eddie Hung <eddie@fpgeh.com> | 2019-09-02 12:13:44 -0700 |
commit | 2fa3857963376859628473123e4a36282ac14c8d (patch) | |
tree | e8517c0f7fed6c06ae6c716568282ffd18bea525 /tests | |
parent | 4290548de35beba766bd7e0684e19de83a0cb2fa (diff) | |
parent | 7e8f7f4c59c96897159d32771d0c7179c5474281 (diff) | |
download | yosys-2fa3857963376859628473123e4a36282ac14c8d.tar.gz yosys-2fa3857963376859628473123e4a36282ac14c8d.tar.bz2 yosys-2fa3857963376859628473123e4a36282ac14c8d.zip |
Merge remote-tracking branch 'origin/master' into xaig_arrival
Diffstat (limited to 'tests')
-rw-r--r-- | tests/ice40/macc.v | 4 | ||||
-rw-r--r-- | tests/ice40/macc.ys | 13 |
2 files changed, 10 insertions, 7 deletions
diff --git a/tests/ice40/macc.v b/tests/ice40/macc.v index 63a3d3a74..6c3676c83 100644 --- a/tests/ice40/macc.v +++ b/tests/ice40/macc.v @@ -2,8 +2,8 @@ Example from: https://www.latticesemi.com/-/media/LatticeSemi/Documents/UserManuals/EI/iCEcube201701UserGuide.ashx?document_id=52071 [p. 77]. */ module top(clk,a,b,c,set); -parameter A_WIDTH = 4; -parameter B_WIDTH = 3; +parameter A_WIDTH = 6 /*4*/; +parameter B_WIDTH = 6 /*3*/; input set; input clk; input signed [(A_WIDTH - 1):0] a; diff --git a/tests/ice40/macc.ys b/tests/ice40/macc.ys index fe5b5f662..0f4c19be5 100644 --- a/tests/ice40/macc.ys +++ b/tests/ice40/macc.ys @@ -1,10 +1,13 @@ read_verilog macc.v proc hierarchy -top top -equiv_opt -assert -map +/ice40/cells_sim.v synth_ice40 -dsp # equivalency check +#equiv_opt -assert -map +/ice40/cells_sim.v synth_ice40 -dsp # equivalency check + +equiv_opt -run :prove -map +/ice40/cells_sim.v synth_ice40 -dsp +async2sync +equiv_opt -run prove: -assert null + design -load postopt # load the post-opt design (otherwise equiv_opt loads the pre-opt design) cd top # Constrain all select calls below inside the top module -select -assert-count 38 t:SB_LUT4 -select -assert-count 3 t:SB_CARRY -select -assert-count 7 t:SB_DFFSR -select -assert-none t:SB_LUT4 t:SB_CARRY t:SB_DFFSR %% t:* %D +select -assert-count 1 t:SB_MAC16 +select -assert-none t:SB_MAC16 %% t:* %D |