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| author | whitequark <whitequark@whitequark.org> | 2020-04-22 01:15:27 +0000 |
|---|---|---|
| committer | whitequark <whitequark@whitequark.org> | 2020-04-22 01:15:27 +0000 |
| commit | 1d5b6ac253a397d173b92549d420d898f80e577f (patch) | |
| tree | 2b836f67a862bb3d625f98ac4630d218c2fbb0dd /tests | |
| parent | 5f17e0ced552afb0a27bd244727ce58c24f45e95 (diff) | |
| download | yosys-1d5b6ac253a397d173b92549d420d898f80e577f.tar.gz yosys-1d5b6ac253a397d173b92549d420d898f80e577f.tar.bz2 yosys-1d5b6ac253a397d173b92549d420d898f80e577f.zip | |
cxxrtl: add an unsupported knob for manipulating clock trees.
This is quite possibly the worst way to implement this, but it does
work for a subset of well-behaved designs, and can be used to measure
how much performance is lost simulating the inactive edge of a clock.
It should be replaced with a clock tree analyzer generating safe
code once it is clear how should such a thing look like.
Diffstat (limited to 'tests')
0 files changed, 0 insertions, 0 deletions