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| author | N. Engelhardt <nak@symbioticeda.com> | 2020-02-13 12:01:27 +0100 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2020-02-13 12:01:27 +0100 |
| commit | e069259a5380073e4599ae689ee9e7ac1abdb6e7 (patch) | |
| tree | ce1899e3544a640c92455c2a7d5714e8dd31ea8a /tests/various | |
| parent | c244b27b6db72b5341186f732c8fba030c177164 (diff) | |
| parent | 90c78f1f85f7e519b3d99a71722bbb40e7ee2960 (diff) | |
| download | yosys-e069259a5380073e4599ae689ee9e7ac1abdb6e7.tar.gz yosys-e069259a5380073e4599ae689ee9e7ac1abdb6e7.tar.bz2 yosys-e069259a5380073e4599ae689ee9e7ac1abdb6e7.zip | |
Merge pull request #1679 from thasti/delay-parsing
Fix crash on wire declaration with delay
Diffstat (limited to 'tests/various')
| -rw-r--r-- | tests/various/bug1614.ys | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/tests/various/bug1614.ys b/tests/various/bug1614.ys new file mode 100644 index 000000000..6fbe84a4c --- /dev/null +++ b/tests/various/bug1614.ys @@ -0,0 +1,5 @@ +read_verilog <<EOT +module testcase; + wire [3:0] #1 a = 4'b0000; +endmodule +EOT |