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| author | Eddie Hung <eddie@fpgeh.com> | 2020-05-14 11:56:22 -0700 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2020-05-14 11:56:22 -0700 |
| commit | 73b7ea713ce5d796985678b2732b3a5259d43639 (patch) | |
| tree | f62376171f7401d5257f7d49d57743e90760b703 /tests/unit | |
| parent | 5bcde7ccc331e575682823222c97cc414bb3d808 (diff) | |
| parent | cd92a706aeef938625f6402d22825729e32649d8 (diff) | |
| download | yosys-73b7ea713ce5d796985678b2732b3a5259d43639.tar.gz yosys-73b7ea713ce5d796985678b2732b3a5259d43639.tar.bz2 yosys-73b7ea713ce5d796985678b2732b3a5259d43639.zip | |
Merge pull request #1994 from YosysHQ/eddie/fix_bug1758
opt_expr: improve single-bit $and/$or/$xor/$xnor cells; gate cells too
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