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| author | Eddie Hung <eddie@fpgeh.com> | 2019-09-20 17:58:51 -0700 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2019-09-20 17:58:51 -0700 |
| commit | 7c8de1dd180e4d6cf708700d73f29f3b581722ce (patch) | |
| tree | a1aefed72ac4291f41d77ea3fe651c500cebab35 /tests/techmap/autopurge.ys | |
| parent | ec08a031b548749bc3177ed3fdddcaf463043d26 (diff) | |
| download | yosys-7c8de1dd180e4d6cf708700d73f29f3b581722ce.tar.gz yosys-7c8de1dd180e4d6cf708700d73f29f3b581722ce.tar.bz2 yosys-7c8de1dd180e4d6cf708700d73f29f3b581722ce.zip | |
Hell let's add the original #1381 testcase too
Diffstat (limited to 'tests/techmap/autopurge.ys')
| -rw-r--r-- | tests/techmap/autopurge.ys | 25 |
1 files changed, 22 insertions, 3 deletions
diff --git a/tests/techmap/autopurge.ys b/tests/techmap/autopurge.ys index 4773d5ce3..1eb99ec37 100644 --- a/tests/techmap/autopurge.ys +++ b/tests/techmap/autopurge.ys @@ -1,6 +1,6 @@ -# https://github.com/YosysHQ/yosys/issues/1391 +# https://github.com/YosysHQ/yosys/issues/1381 read_verilog <<EOT -module sub(input i, output o, (* techmap_autopurge *) input [1:0] j); +module sub(input i, output o, (* techmap_autopurge *) input j); foobar f(i, o, j); endmodule EOT @@ -24,7 +24,16 @@ techmap -map %techmap hierarchy check -assert -read_verilog -overwrite <<EOT +# https://github.com/YosysHQ/yosys/issues/1391 +design -reset +read_verilog <<EOT +module sub(input i, output o, (* techmap_autopurge *) input [1:0] j); +foobar f(i, o, j); +endmodule +EOT +design -stash techmap + +read_verilog <<EOT (* blackbox *) module sub(input i, output o, input j); endmodule @@ -34,6 +43,16 @@ module foobar(input i, output o, input j); endmodule module top(input i, output o); +sub s0(i, o); +endmodule +EOT + +techmap -map %techmap +hierarchy +check -assert + +read_verilog -overwrite <<EOT +module top(input i, output o); wire j; sub s0(i, o, j); endmodule |