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authorClifford Wolf <clifford@clifford.at>2017-07-28 15:33:30 +0200
committerClifford Wolf <clifford@clifford.at>2017-07-28 17:39:43 +0200
commit4cf890dac121dc977fc4507168b48e47aecf5c46 (patch)
tree35f53140121d1d2eb6e0412f994b31d8562b2a43 /tests/sva/Makefile
parent5a828fff34ae8e0da7d887232daa516db1e37a21 (diff)
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Add simple VHDL+PSL example
Diffstat (limited to 'tests/sva/Makefile')
-rw-r--r--tests/sva/Makefile8
1 files changed, 4 insertions, 4 deletions
diff --git a/tests/sva/Makefile b/tests/sva/Makefile
index c2ee5e9d8..1b217f746 100644
--- a/tests/sva/Makefile
+++ b/tests/sva/Makefile
@@ -1,13 +1,13 @@
-TESTS = $(basename $(wildcard *.sv))
+TESTS = $(sort $(basename $(wildcard *.sv)) $(basename $(wildcard *.vhd)))
all: $(addsuffix .ok,$(TESTS))
-%.ok: %.sv
- bash runtest.sh $<
+%.ok:
+ bash runtest.sh $@
clean:
- rm -rf $(addsuffix .ok,$(TESTS))
+ rm -rf $(addsuffix .ok,$(TESTS)) $(addsuffix .sby,$(TESTS)) $(TESTS)
rm -rf $(addsuffix _pass.sby,$(TESTS)) $(addsuffix _pass,$(TESTS))
rm -rf $(addsuffix _fail.sby,$(TESTS)) $(addsuffix _fail,$(TESTS))