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| author | Clifford Wolf <clifford@clifford.at> | 2013-11-02 13:00:17 +0100 |
|---|---|---|
| committer | Clifford Wolf <clifford@clifford.at> | 2013-11-02 13:00:17 +0100 |
| commit | 943329c1dc25609f848d4f5ce837c362e5fd2642 (patch) | |
| tree | f8b06fa1056390803404463fcf062035cdfe88e5 /tests/simple | |
| parent | 0b4a64ac6adbd6c61e09517c4ea98cabd8b8b9ad (diff) | |
| download | yosys-943329c1dc25609f848d4f5ce837c362e5fd2642.tar.gz yosys-943329c1dc25609f848d4f5ce837c362e5fd2642.tar.bz2 yosys-943329c1dc25609f848d4f5ce837c362e5fd2642.zip | |
Various ast changes for early expression width detection (prep for constfold fixes)
Diffstat (limited to 'tests/simple')
| -rw-r--r-- | tests/simple/vloghammer.v | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/tests/simple/vloghammer.v b/tests/simple/vloghammer.v index fffa35050..c705bfa7f 100644 --- a/tests/simple/vloghammer.v +++ b/tests/simple/vloghammer.v @@ -73,3 +73,10 @@ module test10(a, b, c, y); assign y = ^(a ? b : c); endmodule +module test11(a, b, y); + input signed [3:0] a; + input signed [3:0] b; + output signed [5:0] y; + assign y = -(5'd27); +endmodule + |