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| author | Clifford Wolf <clifford@clifford.at> | 2017-01-04 12:39:01 +0100 |
|---|---|---|
| committer | Clifford Wolf <clifford@clifford.at> | 2017-01-04 12:39:01 +0100 |
| commit | 080004b19a035d2398d8defa3f3e207137801827 (patch) | |
| tree | 8130a5565f6b0201cfc1ecb4f92a6d3afdef1c53 /tests/simple/arraycells.v | |
| parent | ed812ea39c85139bc18caee9c0d2f6b8e95bc91b (diff) | |
| download | yosys-080004b19a035d2398d8defa3f3e207137801827.tar.gz yosys-080004b19a035d2398d8defa3f3e207137801827.tar.bz2 yosys-080004b19a035d2398d8defa3f3e207137801827.zip | |
Fixed typo in tests/simple/arraycells.v
Diffstat (limited to 'tests/simple/arraycells.v')
| -rw-r--r-- | tests/simple/arraycells.v | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/tests/simple/arraycells.v b/tests/simple/arraycells.v index 704ca3fda..fd85a1195 100644 --- a/tests/simple/arraycells.v +++ b/tests/simple/arraycells.v @@ -2,7 +2,7 @@ module array_test001(a, b, c, y); input a; input [31:0] b, c; - input [31:0] y; + output [31:0] y; aoi12 p [31:0] (a, b, c, y); endmodule |