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author | Clifford Wolf <clifford@clifford.at> | 2014-02-04 13:43:34 +0100 |
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committer | Clifford Wolf <clifford@clifford.at> | 2014-02-04 13:43:34 +0100 |
commit | 7a66b38c3e7e05e712144d63691f517ecca18d1d (patch) | |
tree | b15747a95b464ab78101d0c46caed2daaff57a00 /tests/sat/asserts.ys | |
parent | 6891fd79a32d8b528978893e88dcb8b25bf66ef0 (diff) | |
download | yosys-7a66b38c3e7e05e712144d63691f517ecca18d1d.tar.gz yosys-7a66b38c3e7e05e712144d63691f517ecca18d1d.tar.bz2 yosys-7a66b38c3e7e05e712144d63691f517ecca18d1d.zip |
Added test cases for sat command
Diffstat (limited to 'tests/sat/asserts.ys')
-rw-r--r-- | tests/sat/asserts.ys | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/tests/sat/asserts.ys b/tests/sat/asserts.ys new file mode 100644 index 000000000..de5e7c9aa --- /dev/null +++ b/tests/sat/asserts.ys @@ -0,0 +1,3 @@ +read_verilog asserts.v +hierarchy; proc; opt +sat -verify -seq 1 -set-at 1 rst 1 -tempinduct -prove-asserts |