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author | Marcin KoĆcielnicki <mwk@0x04.net> | 2019-11-27 00:46:21 +0100 |
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committer | Marcin KoĆcielnicki <mwk@0x04.net> | 2019-11-27 08:01:07 +0100 |
commit | fdcbda195b8806cc3f8fb98e80da55e756c285c4 (patch) | |
tree | 512d3cad4d5d3bff84ed3313a22f790fe93d9beb /tests/opt | |
parent | 0466c48533ad2831a95c6b63c3a190adb76499e9 (diff) | |
download | yosys-fdcbda195b8806cc3f8fb98e80da55e756c285c4.tar.gz yosys-fdcbda195b8806cc3f8fb98e80da55e756c285c4.tar.bz2 yosys-fdcbda195b8806cc3f8fb98e80da55e756c285c4.zip |
opt_share: Fix handling of fine cells.
Fixes #1525.
Diffstat (limited to 'tests/opt')
-rw-r--r-- | tests/opt/bug1525.ys | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/tests/opt/bug1525.ys b/tests/opt/bug1525.ys new file mode 100644 index 000000000..972bc0ac7 --- /dev/null +++ b/tests/opt/bug1525.ys @@ -0,0 +1,13 @@ +read_verilog << EOF +module top(...); +input A1, A2, B, S; +output O; + +assign O = S ? (A1 & B) : (A2 & B); + +endmodule +EOF + +simplemap +opt_share +dump |