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| author | whitequark <whitequark@whitequark.org> | 2018-12-05 15:26:40 +0000 |
|---|---|---|
| committer | whitequark <whitequark@whitequark.org> | 2018-12-05 16:30:37 +0000 |
| commit | 45cb6200af13469724de42656f2c1f0f61c8766a (patch) | |
| tree | c5dff0100358efc89b90995603b9b4365777e4bb /tests/opt | |
| parent | e6034840702effa2ff0c2eee0cca046b5c097e86 (diff) | |
| download | yosys-45cb6200af13469724de42656f2c1f0f61c8766a.tar.gz yosys-45cb6200af13469724de42656f2c1f0f61c8766a.tar.bz2 yosys-45cb6200af13469724de42656f2c1f0f61c8766a.zip | |
opt_lut: add -dlogic, to avoid disturbing logic such as carry chains.
Diffstat (limited to 'tests/opt')
| -rw-r--r-- | tests/opt/opt_lut.ys | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/tests/opt/opt_lut.ys b/tests/opt/opt_lut.ys index 1c7dc1473..86ad93bb3 100644 --- a/tests/opt/opt_lut.ys +++ b/tests/opt/opt_lut.ys @@ -3,7 +3,7 @@ synth_ice40 ice40_unlut design -save preopt -opt_lut +opt_lut -dlogic SB_CARRY:I0=1:I1=2:CI=3 design -stash postopt design -copy-from preopt -as preopt top |