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| author | whitequark <whitequark@whitequark.org> | 2018-12-31 23:53:23 +0000 |
|---|---|---|
| committer | whitequark <whitequark@whitequark.org> | 2018-12-31 23:55:40 +0000 |
| commit | 42c356c49c04a735fe27e672ff31452170f84b40 (patch) | |
| tree | c794e925cb1c97324c6a0be573fc1b916ad4ddb2 /tests/opt/opt_lut_elim.il | |
| parent | 0a840dd88334c382314db3aafc2f1da2a1969df2 (diff) | |
| download | yosys-42c356c49c04a735fe27e672ff31452170f84b40.tar.gz yosys-42c356c49c04a735fe27e672ff31452170f84b40.tar.bz2 yosys-42c356c49c04a735fe27e672ff31452170f84b40.zip | |
opt_lut: eliminate LUTs evaluating to constants or inputs.
Diffstat (limited to 'tests/opt/opt_lut_elim.il')
| -rw-r--r-- | tests/opt/opt_lut_elim.il | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/tests/opt/opt_lut_elim.il b/tests/opt/opt_lut_elim.il new file mode 100644 index 000000000..75675d983 --- /dev/null +++ b/tests/opt/opt_lut_elim.il @@ -0,0 +1,19 @@ +module \test + wire input 1 \i + + wire output 2 \o1 + cell $lut $1 + parameter \LUT 16'0110100110010110 + parameter \WIDTH 4 + connect \A { \i 3'000 } + connect \Y \o1 + end + + wire output 2 \o2 + cell $lut $2 + parameter \LUT 16'0110100010010110 + parameter \WIDTH 4 + connect \A { \i 3'000 } + connect \Y \o2 + end +end |