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author | Pepijn de Vos <pepijndevos@gmail.com> | 2019-10-21 10:51:34 +0200 |
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committer | Pepijn de Vos <pepijndevos@gmail.com> | 2019-10-21 10:51:34 +0200 |
commit | 69fb3b8db21c8a50fa333bff3ef844af42729e0d (patch) | |
tree | 1a62aebe9ece22b19b4087f2c5cb5581b571c270 /tests/arch/common/shifter.v | |
parent | 72323e11a4ee222c0ce928669d33333c46fb25aa (diff) | |
parent | fa989e59e5a37d804d8a82050e022b8f4b7070d8 (diff) | |
download | yosys-69fb3b8db21c8a50fa333bff3ef844af42729e0d.tar.gz yosys-69fb3b8db21c8a50fa333bff3ef844af42729e0d.tar.bz2 yosys-69fb3b8db21c8a50fa333bff3ef844af42729e0d.zip |
Merge branch 'master' of https://github.com/YosysHQ/yosys into gowin
Diffstat (limited to 'tests/arch/common/shifter.v')
-rw-r--r-- | tests/arch/common/shifter.v | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/tests/arch/common/shifter.v b/tests/arch/common/shifter.v new file mode 100644 index 000000000..cace3b588 --- /dev/null +++ b/tests/arch/common/shifter.v @@ -0,0 +1,11 @@ +module top(out, clk, in);
+ output [7:0] out;
+ input signed clk, in;
+ reg signed [7:0] out = 0;
+
+ always @(posedge clk)
+ begin
+ out <= out >> 1;
+ out[7] <= in;
+ end
+endmodule
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