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| author | Eddie Hung <eddie@fpgeh.com> | 2019-12-19 10:29:40 -0800 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2019-12-19 10:29:40 -0800 |
| commit | 94f15f023c8720d84211ac75980cf0b0f492411d (patch) | |
| tree | 29f40490883b15fec68ef6aba99767a0deaecc4f /tests/arch/common/memory.v | |
| parent | 76ba06a79ea917a0e515aa0e99ae41f42e8bddc9 (diff) | |
| parent | f52c6efd9da161e625538f9e8c23875efebda60f (diff) | |
| download | yosys-94f15f023c8720d84211ac75980cf0b0f492411d.tar.gz yosys-94f15f023c8720d84211ac75980cf0b0f492411d.tar.bz2 yosys-94f15f023c8720d84211ac75980cf0b0f492411d.zip | |
Merge remote-tracking branch 'origin/master' into xaig_dff
Diffstat (limited to 'tests/arch/common/memory.v')
| -rw-r--r-- | tests/arch/common/memory.v | 21 |
1 files changed, 0 insertions, 21 deletions
diff --git a/tests/arch/common/memory.v b/tests/arch/common/memory.v deleted file mode 100644 index cb7753f7b..000000000 --- a/tests/arch/common/memory.v +++ /dev/null @@ -1,21 +0,0 @@ -module top -( - input [7:0] data_a, - input [6:1] addr_a, - input we_a, clk, - output reg [7:0] q_a -); - // Declare the RAM variable - reg [7:0] ram[63:0]; - - // Port A - always @ (posedge clk) - begin - if (we_a) - begin - ram[addr_a] <= data_a; - q_a <= data_a; - end - q_a <= ram[addr_a]; - end -endmodule |