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author | Marcelina KoĆcielnicka <mwk@0x04.net> | 2021-05-25 19:31:53 +0200 |
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committer | Marcelina KoĆcielnicka <mwk@0x04.net> | 2021-05-25 22:42:03 +0200 |
commit | 18806f1ef653f29654533ee47fd8a1b0cf1d645a (patch) | |
tree | 0643b3e6df614a31938e1b1af72cbab577f5fdf7 /tests/arch/anlogic | |
parent | 0795b3ec076d8d2c0aa0d954b707271bd2f064bf (diff) | |
download | yosys-18806f1ef653f29654533ee47fd8a1b0cf1d645a.tar.gz yosys-18806f1ef653f29654533ee47fd8a1b0cf1d645a.tar.bz2 yosys-18806f1ef653f29654533ee47fd8a1b0cf1d645a.zip |
memory_bram: Reuse extract_rdff helper for make_outreg.
Also properly skip read ports with init value or reset when not making
use of make_outreg. Proper support for matching those will land later.
Diffstat (limited to 'tests/arch/anlogic')
-rw-r--r-- | tests/arch/anlogic/lutram.ys | 9 |
1 files changed, 4 insertions, 5 deletions
diff --git a/tests/arch/anlogic/lutram.ys b/tests/arch/anlogic/lutram.ys index 9ebb75443..6dbdbdac3 100644 --- a/tests/arch/anlogic/lutram.ys +++ b/tests/arch/anlogic/lutram.ys @@ -13,9 +13,8 @@ miter -equiv -flatten -make_assert -make_outputs gold gate miter design -load postopt cd lutram_1w1r -select -assert-count 8 t:AL_MAP_LUT2 -select -assert-count 8 t:AL_MAP_LUT4 -select -assert-count 8 t:AL_MAP_LUT5 -select -assert-count 36 t:AL_MAP_SEQ +select -assert-count 4 t:AL_MAP_LUT3 +select -assert-count 8 t:AL_MAP_LUT6 +select -assert-count 8 t:AL_MAP_SEQ select -assert-count 8 t:EG_LOGIC_DRAM16X4 #Why not AL_LOGIC_BRAM? -select -assert-none t:AL_MAP_LUT2 t:AL_MAP_LUT4 t:AL_MAP_LUT5 t:AL_MAP_SEQ t:EG_LOGIC_DRAM16X4 %% t:* %D +select -assert-none t:AL_MAP_LUT3 t:AL_MAP_LUT6 t:AL_MAP_SEQ t:EG_LOGIC_DRAM16X4 %% t:* %D |