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| author | Miodrag Milanović <mmicko@gmail.com> | 2019-10-18 14:29:44 +0200 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2019-10-18 14:29:44 +0200 |
| commit | e8ef3fcdfcacbc711a4722deee95f0707634bed0 (patch) | |
| tree | 971fae1a1b7d3204827759454fa55accdc9bc01f /tests/anlogic/add_sub.v | |
| parent | 3c41599ee1f62e4d77ba630fa1a245ef3fe236fa (diff) | |
| parent | 190b40341abd73ab5edf0e6740b6526e9575253b (diff) | |
| download | yosys-e8ef3fcdfcacbc711a4722deee95f0707634bed0.tar.gz yosys-e8ef3fcdfcacbc711a4722deee95f0707634bed0.tar.bz2 yosys-e8ef3fcdfcacbc711a4722deee95f0707634bed0.zip | |
Merge pull request #1454 from YosysHQ/mmicko/common_tests
Share common tests
Diffstat (limited to 'tests/anlogic/add_sub.v')
| -rw-r--r-- | tests/anlogic/add_sub.v | 13 |
1 files changed, 0 insertions, 13 deletions
diff --git a/tests/anlogic/add_sub.v b/tests/anlogic/add_sub.v deleted file mode 100644 index 177c32e30..000000000 --- a/tests/anlogic/add_sub.v +++ /dev/null @@ -1,13 +0,0 @@ -module top -( - input [3:0] x, - input [3:0] y, - - output [3:0] A, - output [3:0] B - ); - -assign A = x + y; -assign B = x - y; - -endmodule |