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| author | Eddie Hung <eddie@fpgeh.com> | 2019-07-10 19:01:13 -0700 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2019-07-10 19:01:13 -0700 |
| commit | f3511e4f9358b0eb053893877ab615b66325da39 (patch) | |
| tree | 71469c1244bf74245b5b8bdd5855930a665ccccf /techlibs | |
| parent | 71acd3ddcfc9083f23ee624de1c16be6b8dbe4d6 (diff) | |
| download | yosys-f3511e4f9358b0eb053893877ab615b66325da39.tar.gz yosys-f3511e4f9358b0eb053893877ab615b66325da39.tar.bz2 yosys-f3511e4f9358b0eb053893877ab615b66325da39.zip | |
Use \$currQ
Diffstat (limited to 'techlibs')
| -rw-r--r-- | techlibs/xilinx/abc_ff.v | 13 |
1 files changed, 9 insertions, 4 deletions
diff --git a/techlibs/xilinx/abc_ff.v b/techlibs/xilinx/abc_ff.v index d0087501d..96cbb1e04 100644 --- a/techlibs/xilinx/abc_ff.v +++ b/techlibs/xilinx/abc_ff.v @@ -66,8 +66,13 @@ module FDCE (output reg Q, input C, CE, D, CLR); ) _TECHMAP_REPLACE_ ( .D(D), .Q(\$nextQ ), .\$pastQ (Q), .C(C), .CE(CE), .CLR(CLR) ); - \$__ABC_FF_ abc_dff (.D(\$nextQ ), .Q(Q)); - \$__ABC_FD_ASYNC_MUX abc_async_mux (.A(\$currQ ), .B(1'b0), .S(CLR), .Y(Q)); + \$__ABC_FF_ abc_dff (.D(\$nextQ ), .Q(\$currQ )); + generate + if (IS_PRE_INVERTED) + \$__ABC_FD_ASYNC_MUX abc_async_mux (.A(\$currQ ), .B(1'b0), .S(CLR), .Y(Q)); + else + \$__ABC_FD_ASYNC_MUX abc_async_mux (.A(1'b0), .B(\$currQ ), .S(CLR), .Y(Q)); + endgenerate endmodule module FDCE_1 (output reg Q, input C, CE, D, CLR); parameter [0:0] INIT = 1'b0; @@ -99,7 +104,7 @@ module FDPE (output reg Q, input C, CE, D, PRE); ) _TECHMAP_REPLACE_ ( .D(D), .Q(\$nextQ ), .\$pastQ (Q), .C(C), .CE(CE), .PRE(PRE) ); - \$__ABC_FF_ abc_dff (.D(\$nextQ ), .Q(Q)); + \$__ABC_FF_ abc_dff (.D(\$nextQ ), .Q(\$currQ )); generate if (IS_PRE_INVERTED) \$__ABC_FD_ASYNC_MUX abc_async_mux (.A(\$currQ ), .B(1'b1), .S(PRE), .Y(Q)); @@ -117,7 +122,7 @@ module FDPE_1 (output reg Q, input C, CE, D, CLR); ) _TECHMAP_REPLACE_ ( .D(D), .Q(\$nextQ ), .\$pastQ (Q), .C(C), .CE(CE), .PRE(PRE) ); - \$__ABC_FF_ abc_dff (.D(\$nextQ ), .Q(Q)); + \$__ABC_FF_ abc_dff (.D(\$nextQ ), .Q(\$currQ )); \$__ABC_FD_ASYNC_MUX abc_async_mux (.A(\$currQ ), .B(1'b1), .S(PRE), .Y(Q)); endmodule |