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| author | Marcelina Kościelnicka <mwk@0x04.net> | 2021-10-02 01:23:43 +0200 |
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| committer | Marcelina Kościelnicka <mwk@0x04.net> | 2021-10-02 21:01:21 +0200 |
| commit | e7d89e653c9d295d3cc9547b83660658e4d1c95b (patch) | |
| tree | a9065acd5252b3ad0271f8a198a7acbfe0921628 /techlibs | |
| parent | ba0723cad77a327653c080da84dda9f6ef12fad1 (diff) | |
| download | yosys-e7d89e653c9d295d3cc9547b83660658e4d1c95b.tar.gz yosys-e7d89e653c9d295d3cc9547b83660658e4d1c95b.tar.bz2 yosys-e7d89e653c9d295d3cc9547b83660658e4d1c95b.zip | |
Hook up $aldff support in various passes.
Diffstat (limited to 'techlibs')
| -rw-r--r-- | techlibs/common/techmap.v | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/techlibs/common/techmap.v b/techlibs/common/techmap.v index d3dc85f24..667773e1b 100644 --- a/techlibs/common/techmap.v +++ b/techlibs/common/techmap.v @@ -64,7 +64,7 @@ module _90_simplemap_various; endmodule (* techmap_simplemap *) -(* techmap_celltype = "$sr $ff $dff $dffe $adff $adffe $sdff $sdffe $sdffce $dffsr $dffsre $dlatch $adlatch $dlatchsr" *) +(* techmap_celltype = "$sr $ff $dff $dffe $adff $adffe $aldff $aldffe $sdff $sdffe $sdffce $dffsr $dffsre $dlatch $adlatch $dlatchsr" *) module _90_simplemap_registers; endmodule |