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| author | TaoBi22 <beahealy22@gmail.com> | 2022-09-27 16:31:57 +0100 |
|---|---|---|
| committer | myrtle <gatecat@ds0.me> | 2022-11-17 13:34:58 +0100 |
| commit | 950dde30817af8191a2e763126b2c15bdfb403a4 (patch) | |
| tree | 58ae682bbb7d056a1bf446d127325925a2a97d70 /techlibs | |
| parent | 8fdf4948a8e0e40afd56320673baa38ff90665dc (diff) | |
| download | yosys-950dde30817af8191a2e763126b2c15bdfb403a4.tar.gz yosys-950dde30817af8191a2e763126b2c15bdfb403a4.tar.bz2 yosys-950dde30817af8191a2e763126b2c15bdfb403a4.zip | |
Remove flattening from FABulous pass
Diffstat (limited to 'techlibs')
| -rw-r--r-- | techlibs/fabulous/synth_fabulous.cc | 13 |
1 files changed, 2 insertions, 11 deletions
diff --git a/techlibs/fabulous/synth_fabulous.cc b/techlibs/fabulous/synth_fabulous.cc index 1b693ab5c..bd373c410 100644 --- a/techlibs/fabulous/synth_fabulous.cc +++ b/techlibs/fabulous/synth_fabulous.cc @@ -44,10 +44,6 @@ struct SynthPass : public ScriptPass log(" -auto-top\n"); log(" automatically determine the top of the design hierarchy\n"); log("\n"); - log(" -flatten\n"); - log(" flatten the design before synthesis. this will pass '-auto-top' to\n"); - log(" 'hierarchy' if no top module is specified.\n"); - log("\n"); log(" -lut <k>\n"); log(" perform synthesis for a k-LUT architecture (default 4).\n"); log("\n"); @@ -63,14 +59,13 @@ struct SynthPass : public ScriptPass } string top_module; - bool autotop, flatten, forvpr; + bool autotop, forvpr; int lut; void clear_flags() override { top_module.clear(); autotop = false; - flatten = false; lut = 4; forvpr = false; } @@ -107,10 +102,6 @@ struct SynthPass : public ScriptPass autotop = true; continue; } - if (args[argidx] == "-flatten") { - flatten = true; - continue; - } if (args[argidx] == "-lut") { lut = atoi(args[++argidx].c_str()); continue; @@ -133,7 +124,7 @@ struct SynthPass : public ScriptPass void script() override { if (top_module.empty()) { - if (flatten || autotop) + if (autotop) run("hierarchy -check -auto-top"); else run("hierarchy -check"); |