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author | Andrew Zonenberg <azonenberg@drawersteak.com> | 2016-12-20 13:07:49 +0800 |
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committer | Andrew Zonenberg <azonenberg@drawersteak.com> | 2016-12-20 13:07:49 +0800 |
commit | 638f3e3b1205b16e6e5fe2e9c611bfd0853d2550 (patch) | |
tree | b165f88ba7e790654aad0de0415d0957a6ddd61a /techlibs | |
parent | 073e8df9f1ca88ae30f5c61f7a620b02210e1747 (diff) | |
download | yosys-638f3e3b1205b16e6e5fe2e9c611bfd0853d2550.tar.gz yosys-638f3e3b1205b16e6e5fe2e9c611bfd0853d2550.tar.bz2 yosys-638f3e3b1205b16e6e5fe2e9c611bfd0853d2550.zip |
greenpak4: Removed SPI_BUFFER parameter
Diffstat (limited to 'techlibs')
-rw-r--r-- | techlibs/greenpak4/cells_sim.v | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/techlibs/greenpak4/cells_sim.v b/techlibs/greenpak4/cells_sim.v index 3263c4ebc..8b22630fe 100644 --- a/techlibs/greenpak4/cells_sim.v +++ b/techlibs/greenpak4/cells_sim.v @@ -602,7 +602,6 @@ module GP_SPI( initial DOUT_HIGH = 0; initial DOUT_LOW = 0; - parameter ADC_BUFFER = 0; //set true to use SPI data as ADC buffer... TODO parameter DATA_WIDTH = 8; //byte or word width parameter SPI_CPHA = 0; //SPI clock phase parameter SPI_CPOL = 0; //SPI clock polarity |