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authorMarcelina Koƛcielnicka <mwk@0x04.net>2021-07-29 16:55:15 +0200
committerMarcelina Koƛcielnicka <mwk@0x04.net>2021-07-29 17:30:07 +0200
commit54e75129e57f29df1099f5cd45cec633d80e3841 (patch)
treeb3293b8f52d9f1c9cc9802588e750e30346178a5 /techlibs
parent3156226233133f5da9dba15c63ca560b4794b831 (diff)
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opt_lut: Allow more than one -dlogic per cell type.
Fixes #2061.
Diffstat (limited to 'techlibs')
-rw-r--r--techlibs/ice40/synth_ice40.cc2
1 files changed, 1 insertions, 1 deletions
diff --git a/techlibs/ice40/synth_ice40.cc b/techlibs/ice40/synth_ice40.cc
index 3c84ea426..421ec3b4e 100644
--- a/techlibs/ice40/synth_ice40.cc
+++ b/techlibs/ice40/synth_ice40.cc
@@ -399,7 +399,7 @@ struct SynthIce40Pass : public ScriptPass
run("ice40_wrapcarry -unwrap");
run("techmap -map +/ice40/ff_map.v");
run("clean");
- run("opt_lut -dlogic SB_CARRY:I0=1:I1=2:CI=3");
+ run("opt_lut -dlogic SB_CARRY:I0=1:I1=2:CI=3 -dlogic SB_CARRY:CO=3");
}
if (check_label("map_cells"))