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author | Eddie Hung <eddie@fpgeh.com> | 2019-06-17 22:29:34 -0700 |
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committer | Eddie Hung <eddie@fpgeh.com> | 2019-06-17 22:29:34 -0700 |
commit | 2b0e28b2617e8aa3a274358755282fb21c88fc5f (patch) | |
tree | 9cade212772e9be46fecb3952808283dd2a6799f /techlibs | |
parent | 59b4e69d16adeba4f7f50dbf80e5564c227587e4 (diff) | |
parent | 608a95eb01ec5c54d09102917e224ff5e0c39d47 (diff) | |
download | yosys-2b0e28b2617e8aa3a274358755282fb21c88fc5f.tar.gz yosys-2b0e28b2617e8aa3a274358755282fb21c88fc5f.tar.bz2 yosys-2b0e28b2617e8aa3a274358755282fb21c88fc5f.zip |
Merge remote-tracking branch 'origin/xaig' into xc7mux
Diffstat (limited to 'techlibs')
-rw-r--r-- | techlibs/xilinx/lut_map.v | 17 |
1 files changed, 8 insertions, 9 deletions
diff --git a/techlibs/xilinx/lut_map.v b/techlibs/xilinx/lut_map.v index fa2a005b1..2f246e46d 100644 --- a/techlibs/xilinx/lut_map.v +++ b/techlibs/xilinx/lut_map.v @@ -32,28 +32,27 @@ module \$lut (A, Y); // Need to swap input ordering, and fix init accordingly, // to match ABC's expectation of LUT inputs in non-decreasing // delay order - localparam P_WIDTH = WIDTH < 4 ? 4 : WIDTH; - function [P_WIDTH-1:0] permute_index; - input [P_WIDTH-1:0] i; + function [WIDTH-1:0] permute_index; + input [WIDTH-1:0] i; integer j; begin permute_index = 0; - for (j = 0; j < P_WIDTH; j = j + 1) - permute_index[P_WIDTH-1 - j] = i[j]; + for (j = 0; j < WIDTH; j = j + 1) + permute_index[WIDTH-1 - j] = i[j]; end endfunction - function [2**P_WIDTH-1:0] permute_init; - input [2**P_WIDTH-1:0] orig; + function [2**WIDTH-1:0] permute_init; + input [2**WIDTH-1:0] orig; integer i; begin permute_init = 0; - for (i = 0; i < 2**P_WIDTH; i = i + 1) + for (i = 0; i < 2**WIDTH; i = i + 1) permute_init[i] = orig[permute_index(i)]; end endfunction - parameter [2**P_WIDTH-1:0] P_LUT = permute_init(LUT); + parameter [2**WIDTH-1:0] P_LUT = permute_init(LUT); generate if (WIDTH == 1) begin |