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| author | Miodrag Milanović <mmicko@gmail.com> | 2019-10-18 10:54:35 +0200 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2019-10-18 10:54:35 +0200 |
| commit | 0568920d7916b7356db216210398f8940d426f0d (patch) | |
| tree | a625838a0efbfb0176a57887c208467a7addd0a6 /techlibs | |
| parent | ab4899a2d02b994d79e4aa223eb743793b9a60b3 (diff) | |
| parent | b4d765054897f7ee388b54d907fd8ce607db2d58 (diff) | |
| download | yosys-0568920d7916b7356db216210398f8940d426f0d.tar.gz yosys-0568920d7916b7356db216210398f8940d426f0d.tar.bz2 yosys-0568920d7916b7356db216210398f8940d426f0d.zip | |
Merge pull request #1435 from YosysHQ/mmicko/efinix
Add tests for Efinix architecture (contd)
Diffstat (limited to 'techlibs')
| -rw-r--r-- | techlibs/efinix/cells_map.v | 12 | ||||
| -rw-r--r-- | techlibs/efinix/cells_sim.v | 4 |
2 files changed, 15 insertions, 1 deletions
diff --git a/techlibs/efinix/cells_map.v b/techlibs/efinix/cells_map.v index 0aeab1902..3ecec3bac 100644 --- a/techlibs/efinix/cells_map.v +++ b/techlibs/efinix/cells_map.v @@ -17,6 +17,18 @@ module \$_DFF_NP1_ (input D, C, R, output Q); EFX_FF #(.CLK_POLARITY(1'b0), .CE module \$_DFF_PP0_ (input D, C, R, output Q); EFX_FF #(.CLK_POLARITY(1'b1), .CE_POLARITY(1'b1), .SR_POLARITY(1'b1), .D_POLARITY(1'b1), .SR_SYNC(1'b0), .SR_VALUE(1'b0), .SR_SYNC_PRIORITY(1'b1)) _TECHMAP_REPLACE_ (.D(D), .CE(1'b1), .CLK(C), .SR(R), .Q(Q)); endmodule module \$_DFF_PP1_ (input D, C, R, output Q); EFX_FF #(.CLK_POLARITY(1'b1), .CE_POLARITY(1'b1), .SR_POLARITY(1'b1), .D_POLARITY(1'b1), .SR_SYNC(1'b0), .SR_VALUE(1'b1), .SR_SYNC_PRIORITY(1'b1)) _TECHMAP_REPLACE_ (.D(D), .CE(1'b1), .CLK(C), .SR(R), .Q(Q)); endmodule +module \$_DLATCH_N_ (E, D, Q); + wire [1023:0] _TECHMAP_DO_ = "simplemap; opt"; + input E, D; + output Q = !E ? D : Q; +endmodule + +module \$_DLATCH_P_ (E, D, Q); + wire [1023:0] _TECHMAP_DO_ = "simplemap; opt"; + input E, D; + output Q = E ? D : Q; +endmodule + `ifndef NO_LUT module \$lut (A, Y); parameter WIDTH = 0; diff --git a/techlibs/efinix/cells_sim.v b/techlibs/efinix/cells_sim.v index 2fc2034a6..a74d1c571 100644 --- a/techlibs/efinix/cells_sim.v +++ b/techlibs/efinix/cells_sim.v @@ -59,7 +59,9 @@ module EFX_FF( assign ce = CE_POLARITY ? CE : ~CE; assign sr = SR_POLARITY ? SR : ~SR; assign d = D_POLARITY ? D : ~D; - + + initial Q = 1'b0; + generate if (SR_SYNC == 1) begin |