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authorEddie Hung <eddie@fpgeh.com>2019-12-16 13:00:58 -0800
committerEddie Hung <eddie@fpgeh.com>2019-12-16 13:00:58 -0800
commitd910bec8e00b5e9eba2fc62dec1a6b734e429cc4 (patch)
treedea34402270519e854aecbe759317839369ea613 /techlibs/xilinx
parent503d1db551b5ab91a6ed262d011f5b9b2fa78d8e (diff)
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Update xc7/xcu bram rules
Diffstat (limited to 'techlibs/xilinx')
-rw-r--r--techlibs/xilinx/xc7_xcu_brams.txt12
1 files changed, 4 insertions, 8 deletions
diff --git a/techlibs/xilinx/xc7_xcu_brams.txt b/techlibs/xilinx/xc7_xcu_brams.txt
index 1374a0a36..60425fed9 100644
--- a/techlibs/xilinx/xc7_xcu_brams.txt
+++ b/techlibs/xilinx/xc7_xcu_brams.txt
@@ -77,8 +77,7 @@ endbram
# https://www.xilinx.com/support/documentation/user_guides/ug473_7Series_Memory_Resources.pdf
match $__XILINX_RAMB36_SDP
- attribute ram_style=block ram_block=1
- attribute !ram_style
+ attribute !ram_style ram_style=block ram_block
attribute !logic_block
min bits 1024
min efficiency 5
@@ -88,8 +87,7 @@ match $__XILINX_RAMB36_SDP
endmatch
match $__XILINX_RAMB18_SDP
- attribute ram_style=block ram_block=1
- attribute !ram_style
+ attribute !ram_style ram_style=block ram_block
attribute !logic_block
min bits 1024
min efficiency 5
@@ -99,8 +97,7 @@ match $__XILINX_RAMB18_SDP
endmatch
match $__XILINX_RAMB36_TDP
- attribute ram_style=block ram_block=1
- attribute !ram_style
+ attribute !ram_style ram_style=block ram_block
attribute !logic_block
min bits 1024
min efficiency 5
@@ -110,8 +107,7 @@ match $__XILINX_RAMB36_TDP
endmatch
match $__XILINX_RAMB18_TDP
- attribute ram_style=block ram_block=1
- attribute !ram_style
+ attribute !ram_style ram_style=block ram_block
attribute !logic_block
min bits 1024
min efficiency 5