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authorEddie Hung <eddie@fpgeh.com>2019-06-10 14:37:09 -0700
committerEddie Hung <eddie@fpgeh.com>2019-06-10 14:37:09 -0700
commitb77c5da76919f7f99f171a0a2775896fbc8debc2 (patch)
tree17a30f327b8efbb40845a0ebbe62e46dbe39e9d6 /techlibs/xilinx
parenta1d4ae78a0ee474af6782bc5e12d8bd1fc790f04 (diff)
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Revert "Revert "Move ff_map back after ABC for shregmap""
This reverts commit e473e7456545d702c011ee7872956f94a8522865.
Diffstat (limited to 'techlibs/xilinx')
-rw-r--r--techlibs/xilinx/synth_xilinx.cc10
1 files changed, 5 insertions, 5 deletions
diff --git a/techlibs/xilinx/synth_xilinx.cc b/techlibs/xilinx/synth_xilinx.cc
index 689a40135..f5f8c43e0 100644
--- a/techlibs/xilinx/synth_xilinx.cc
+++ b/techlibs/xilinx/synth_xilinx.cc
@@ -291,9 +291,7 @@ struct SynthXilinxPass : public ScriptPass
if (check_label("map_cells")) {
if (!nomux || help_mode)
run("muxcover -mux8 -mux16", "(skip if '-nomux')");
- run("techmap -map +/techmap.v -map +/xilinx/cells_map.v -map +/xilinx/ff_map.v");
- run("dffinit -ff FDRE Q INIT -ff FDCE Q INIT -ff FDPE Q INIT -ff FDSE Q INIT "
- "-ff FDRE_1 Q INIT -ff FDCE_1 Q INIT -ff FDPE_1 Q INIT -ff FDSE_1 Q INIT");
+ run("techmap -map +/techmap.v -map +/xilinx/cells_map.v");
run("clean");
}
@@ -309,8 +307,10 @@ struct SynthXilinxPass : public ScriptPass
// This shregmap call infers fixed length shift registers after abc
// has performed any necessary retiming
if (!nosrl || help_mode)
- run("shregmap -tech xilinx_static -minlen 3", "(skip if '-nosrl')");
- run("techmap -map +/xilinx/lut_map.v -map +/xilinx/cells_map.v");
+ run("shregmap -minlen 3 -init -params -enpol any_or_none", "(skip if '-nosrl')");
+ run("techmap -map +/xilinx/lut_map.v -map +/xilinx/cells_map.v -map +/xilinx/ff_map.v");
+ run("dffinit -ff FDRE Q INIT -ff FDCE Q INIT -ff FDPE Q INIT -ff FDSE Q INIT "
+ "-ff FDRE_1 Q INIT -ff FDCE_1 Q INIT -ff FDPE_1 Q INIT -ff FDSE_1 Q INIT");
run("clean");
}