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| author | Clifford Wolf <clifford@clifford.at> | 2017-07-21 14:34:53 +0200 |
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| committer | Clifford Wolf <clifford@clifford.at> | 2017-07-21 14:34:53 +0200 |
| commit | 26766da34392aa4dc773c4e0ec36e7a7e59dad3e (patch) | |
| tree | a05bcf915cfeb50de0bdd695157a77603a643781 /techlibs/xilinx | |
| parent | 3a8f6f0f51d527e13f948f18b87a678d35416409 (diff) | |
| download | yosys-26766da34392aa4dc773c4e0ec36e7a7e59dad3e.tar.gz yosys-26766da34392aa4dc773c4e0ec36e7a7e59dad3e.tar.bz2 yosys-26766da34392aa4dc773c4e0ec36e7a7e59dad3e.zip | |
Add a paragraph about pre-defined macros to read_verilog help message
Diffstat (limited to 'techlibs/xilinx')
0 files changed, 0 insertions, 0 deletions