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| author | Clifford Wolf <clifford@clifford.at> | 2013-10-26 22:28:42 +0200 |
|---|---|---|
| committer | Clifford Wolf <clifford@clifford.at> | 2013-10-26 22:28:42 +0200 |
| commit | 4007b41d40147bf3d282f25f6c177a17fb2a8f76 (patch) | |
| tree | 1b18feb3bd01fa0681c86cb49d8b3efd6d3192e3 /techlibs/xilinx7/example_mojo_counter/example.sh | |
| parent | ceb971eab9802e695e52064d4f7369ab6daea3b3 (diff) | |
| download | yosys-4007b41d40147bf3d282f25f6c177a17fb2a8f76.tar.gz yosys-4007b41d40147bf3d282f25f6c177a17fb2a8f76.tar.bz2 yosys-4007b41d40147bf3d282f25f6c177a17fb2a8f76.zip | |
Improved xilinx mojo_counter example
Diffstat (limited to 'techlibs/xilinx7/example_mojo_counter/example.sh')
| -rw-r--r-- | techlibs/xilinx7/example_mojo_counter/example.sh | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/techlibs/xilinx7/example_mojo_counter/example.sh b/techlibs/xilinx7/example_mojo_counter/example.sh index 17fc650e4..87af0ea31 100644 --- a/techlibs/xilinx7/example_mojo_counter/example.sh +++ b/techlibs/xilinx7/example_mojo_counter/example.sh @@ -19,11 +19,14 @@ abc -lut 6; opt # map internal cells to FPGA cells techmap -map ../cells.v; opt +# insert i/o buffers +iopadmap -outpad OBUF I:O -inpad BUFGP O:I + # write netlist write_edif synth.edif EOT -cat > synth.ut <<- EOT +cat > bitgen.ut <<- EOT -w -g DebugBitstream:No -g Binary:no |