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| author | Eddie Hung <eddie@fpgeh.com> | 2019-06-20 16:45:09 -0700 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2019-06-20 16:45:09 -0700 |
| commit | d1dadfcec8e5fffb1d27f067a86a606591b9c686 (patch) | |
| tree | 84fbfad6e6dced88d61b23fa3ec07b84c4fff846 /techlibs/xilinx/synth_xilinx.cc | |
| parent | 9faab38e8de1a78b0ce364a1bdefd2a9ee9c2ec6 (diff) | |
| download | yosys-d1dadfcec8e5fffb1d27f067a86a606591b9c686.tar.gz yosys-d1dadfcec8e5fffb1d27f067a86a606591b9c686.tar.bz2 yosys-d1dadfcec8e5fffb1d27f067a86a606591b9c686.zip | |
Call opt_expr -mux_undef to get rid of 1'bx in muxes prior to abc
Diffstat (limited to 'techlibs/xilinx/synth_xilinx.cc')
| -rw-r--r-- | techlibs/xilinx/synth_xilinx.cc | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/techlibs/xilinx/synth_xilinx.cc b/techlibs/xilinx/synth_xilinx.cc index 7b20a7132..f1e887df8 100644 --- a/techlibs/xilinx/synth_xilinx.cc +++ b/techlibs/xilinx/synth_xilinx.cc @@ -299,6 +299,7 @@ struct SynthXilinxPass : public ScriptPass } if (check_label("map_luts")) { + run("opt_expr -mux_undef"); if (abc == "abc9") run(abc + " -lut +/xilinx/abc_xc7.lut -box +/xilinx/abc_xc7.box -W " + XC7_WIRE_DELAY + string(retime ? " -dff" : "")); else if (help_mode) |