diff options
author | Eddie Hung <eddie@fpgeh.com> | 2019-06-06 14:43:08 -0700 |
---|---|---|
committer | Eddie Hung <eddie@fpgeh.com> | 2019-06-06 14:43:08 -0700 |
commit | a8c49168fb1e5e665e126c65dc454183a6d7826b (patch) | |
tree | 7cda5e7a9046a7fd024888912e62d0b7d9a7be75 /techlibs/xilinx/synth_xilinx.cc | |
parent | 7166dbe418420bf8f0696b21bff22d5f66a4cc8e (diff) | |
download | yosys-a8c49168fb1e5e665e126c65dc454183a6d7826b.tar.gz yosys-a8c49168fb1e5e665e126c65dc454183a6d7826b.tar.bz2 yosys-a8c49168fb1e5e665e126c65dc454183a6d7826b.zip |
Run muxpack and muxcover in synth_xilinx
Diffstat (limited to 'techlibs/xilinx/synth_xilinx.cc')
-rw-r--r-- | techlibs/xilinx/synth_xilinx.cc | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/techlibs/xilinx/synth_xilinx.cc b/techlibs/xilinx/synth_xilinx.cc index 7686f2cbc..a70bb23f1 100644 --- a/techlibs/xilinx/synth_xilinx.cc +++ b/techlibs/xilinx/synth_xilinx.cc @@ -225,6 +225,9 @@ struct SynthXilinxPass : public ScriptPass if (check_label("coarse")) { run("synth -run coarse"); + if (!nomux || help_mode) + run("muxpack", "(skip if '-nomux')"); + // shregmap -tech xilinx can cope with $shiftx and $mux // cells for identifying variable-length shift registers, // so attempt to convert $pmux-es to the former @@ -286,7 +289,9 @@ struct SynthXilinxPass : public ScriptPass } if (check_label("map_cells")) { - run("techmap -map +/techmap.v -map +/xilinx/cells_map.v -map +/xilinx/ff_map.v "); + if (!nomux || help_mode) + run("muxcover", "(skip if '-nomux')"); + run("techmap -map +/techmap.v -map +/xilinx/cells_map.v -map +/xilinx/ff_map.v"); run("dffinit -ff FDRE Q INIT -ff FDCE Q INIT -ff FDPE Q INIT -ff FDSE Q INIT " "-ff FDRE_1 Q INIT -ff FDCE_1 Q INIT -ff FDPE_1 Q INIT -ff FDSE_1 Q INIT"); run("clean"); |