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author | Eddie Hung <eddie@fpgeh.com> | 2019-09-11 13:06:59 -0700 |
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committer | Eddie Hung <eddie@fpgeh.com> | 2019-09-11 13:06:59 -0700 |
commit | 0ebbecf833712165c495fc15fe67b6287cf1fb72 (patch) | |
tree | 764a455de0a5534c07feda95d6a9c9368b7e812f /techlibs/xilinx/synth_xilinx.cc | |
parent | e9eb855d38b3bd4d5a61471af49e791be12817ba (diff) | |
download | yosys-0ebbecf833712165c495fc15fe67b6287cf1fb72.tar.gz yosys-0ebbecf833712165c495fc15fe67b6287cf1fb72.tar.bz2 yosys-0ebbecf833712165c495fc15fe67b6287cf1fb72.zip |
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Diffstat (limited to 'techlibs/xilinx/synth_xilinx.cc')
-rw-r--r-- | techlibs/xilinx/synth_xilinx.cc | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/techlibs/xilinx/synth_xilinx.cc b/techlibs/xilinx/synth_xilinx.cc index 3d92c3e2c..e822d9b7e 100644 --- a/techlibs/xilinx/synth_xilinx.cc +++ b/techlibs/xilinx/synth_xilinx.cc @@ -83,6 +83,7 @@ struct SynthXilinxPass : public ScriptPass log("\n"); log(" -nodsp\n"); log(" do not use DSP48E1s to implement multipliers and associated logic\n"); + log("\n"); log(" -iopad\n"); log(" enable I/O buffer insertion (selected automatically by -ise)\n"); log("\n"); |