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author | Eddie Hung <eddie@fpgeh.com> | 2019-07-01 10:44:42 -0700 |
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committer | Eddie Hung <eddie@fpgeh.com> | 2019-07-01 10:44:42 -0700 |
commit | 699d8e393953a3e5f0c35afec54464e6810f8f1d (patch) | |
tree | 4edf4b25dd3c9f8eaf1dad737baa49a04f78ec3f /techlibs/xilinx/cells_map.v | |
parent | 75d92fb590b190e0da43e99853f839b7afb10f83 (diff) | |
parent | 0067dc44f3928833eede2b9bb40260be78e11a93 (diff) | |
download | yosys-699d8e393953a3e5f0c35afec54464e6810f8f1d.tar.gz yosys-699d8e393953a3e5f0c35afec54464e6810f8f1d.tar.bz2 yosys-699d8e393953a3e5f0c35afec54464e6810f8f1d.zip |
Merge remote-tracking branch 'origin/master' into xaig_dff
Diffstat (limited to 'techlibs/xilinx/cells_map.v')
-rw-r--r-- | techlibs/xilinx/cells_map.v | 6 |
1 files changed, 2 insertions, 4 deletions
diff --git a/techlibs/xilinx/cells_map.v b/techlibs/xilinx/cells_map.v index b5114758c..9a316fc96 100644 --- a/techlibs/xilinx/cells_map.v +++ b/techlibs/xilinx/cells_map.v @@ -20,16 +20,14 @@ // Convert negative-polarity reset to positive-polarity (* techmap_celltype = "$_DFF_NN0_" *) -module _90_dff_nn0_to_np0(input D, C, R, output Q); \$_DFF_NP0_ _TECHMAP_REPLACE_ (.D(D), .Q(Q), .C(C), .R(~R)); endmodule +module _90_dff_nn0_to_np0 (input D, C, R, output Q); \$_DFF_NP0_ _TECHMAP_REPLACE_ (.D(D), .Q(Q), .C(C), .R(~R)); endmodule (* techmap_celltype = "$_DFF_PN0_" *) -module _90_dff_pn0_to_pp0(input D, C, R, output Q); \$_DFF_PP0_ _TECHMAP_REPLACE_ (.D(D), .Q(Q), .C(C), .R(~R)); endmodule - +module _90_dff_pn0_to_pp0 (input D, C, R, output Q); \$_DFF_PP0_ _TECHMAP_REPLACE_ (.D(D), .Q(Q), .C(C), .R(~R)); endmodule (* techmap_celltype = "$_DFF_NN1_" *) module _90_dff_nn1_to_np1 (input D, C, R, output Q); \$_DFF_NP1 _TECHMAP_REPLACE_ (.D(D), .Q(Q), .C(C), .R(~R)); endmodule (* techmap_celltype = "$_DFF_PN1_" *) module _90_dff_pn1_to_pp1 (input D, C, R, output Q); \$_DFF_PP1 _TECHMAP_REPLACE_ (.D(D), .Q(Q), .C(C), .R(~R)); endmodule - module \$__SHREG_ (input C, input D, input E, output Q); parameter DEPTH = 0; parameter [DEPTH-1:0] INIT = 0; |