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author | Eddie Hung <eddie@fpgeh.com> | 2019-06-22 14:18:42 -0700 |
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committer | Eddie Hung <eddie@fpgeh.com> | 2019-06-22 14:18:42 -0700 |
commit | 7903ebe3e004c03e7870f1b21c4fb478481756eb (patch) | |
tree | 90d91e583a10ddb73df815f6b1e2952ccf1e8f5a /techlibs/xilinx/abc_xc7.box | |
parent | 65c022c2572036a66bd06bafd3e3efa088aafb79 (diff) | |
download | yosys-7903ebe3e004c03e7870f1b21c4fb478481756eb.tar.gz yosys-7903ebe3e004c03e7870f1b21c4fb478481756eb.tar.bz2 yosys-7903ebe3e004c03e7870f1b21c4fb478481756eb.zip |
Carry in/out box ordering now move to end, not swap with end
Diffstat (limited to 'techlibs/xilinx/abc_xc7.box')
-rw-r--r-- | techlibs/xilinx/abc_xc7.box | 24 |
1 files changed, 12 insertions, 12 deletions
diff --git a/techlibs/xilinx/abc_xc7.box b/techlibs/xilinx/abc_xc7.box index c9d80a333..0a6a6eaf0 100644 --- a/techlibs/xilinx/abc_xc7.box +++ b/techlibs/xilinx/abc_xc7.box @@ -12,17 +12,17 @@ MUXF8 2 1 3 1 104 94 273 # CARRY4 + CARRY4_[ABCD]X -# Inputs: S0 S1 S2 S3 CYINIT DI0 DI1 DI2 DI3 CI +# Inputs: CYINIT DI0 DI1 DI2 DI3 S0 S1 S2 S3 CI # Outputs: O0 O1 O2 O3 CO0 CO1 CO2 CO3 -# (NB: carry chain input/output must be last input/output, -# swapped with what normally would have been the last -# output, here: CI <-> S, CO <-> O +# (NB: carry chain input/output must be last +# input/output and have been moved there +# overriding the alphabetical ordering) CARRY4 3 1 10 8 -223 - - - 482 - - - - 222 -400 205 - - 598 407 - - - 334 -523 558 226 - 584 556 537 - - 239 -582 618 330 227 642 615 596 438 - 313 -340 - - - 536 379 - - - 271 -433 469 - - 494 465 445 - - 157 -512 548 292 - 592 540 520 356 - 228 -508 528 378 380 580 526 507 398 385 114 +482 - - - - 223 - - - 222 +598 407 - - - 400 205 - - 334 +584 556 537 - - 523 558 226 - 239 +642 615 596 438 - 582 618 330 227 313 +536 379 - - - 340 - - - 271 +494 465 445 - - 433 469 - - 157 +592 540 520 356 - 512 548 292 - 228 +580 526 507 398 385 508 528 378 380 114 |